JPS564285A - Manufacture of planar type semiconductor device - Google Patents
Manufacture of planar type semiconductor deviceInfo
- Publication number
- JPS564285A JPS564285A JP7966179A JP7966179A JPS564285A JP S564285 A JPS564285 A JP S564285A JP 7966179 A JP7966179 A JP 7966179A JP 7966179 A JP7966179 A JP 7966179A JP S564285 A JPS564285 A JP S564285A
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- opening
- film
- laminated
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D8/00—Diodes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/124—Shapes, relative sizes or dispositions of the regions of semiconductor bodies or of junctions between the regions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/128—Anode regions of diodes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D8/00—Diodes
- H10D8/01—Manufacture or treatment
- H10D8/045—Manufacture or treatment of PN junction diodes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P32/00—Diffusion of dopants within, into or out of wafers, substrates or parts of devices
- H10P32/10—Diffusion of dopants within, into or out of semiconductor bodies or layers
- H10P32/14—Diffusion of dopants within, into or out of semiconductor bodies or layers within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P32/00—Diffusion of dopants within, into or out of wafers, substrates or parts of devices
- H10P32/10—Diffusion of dopants within, into or out of semiconductor bodies or layers
- H10P32/17—Diffusion of dopants within, into or out of semiconductor bodies or layers characterised by the semiconductor material
- H10P32/171—Diffusion of dopants within, into or out of semiconductor bodies or layers characterised by the semiconductor material being group IV material
Landscapes
- Thyristors (AREA)
Abstract
PURPOSE:To provide a planar type semiconductor device having high breakdown voltage by forming laminated insulating films having large and small impurity diffusion coefficients, perforating an opening thereat, forming a polycrystalline layer containing impurity thereon, and diffusing the impurity therefrom into the substrate. CONSTITUTION:An SiO2 film 46 and an Si3N4 film 43 are laminated on an N-type Si substrate 41, a predetermined shape of photoresist film 48 is formed thereon, a dry etching process is conducted thereon with gas plasma to form an opening 42 at the laminated films. Then, a polycrystalline Si layer 49 including Ga is accumulated on the entire surface including the opening 42, is heat treated to diffuse the Ga in the substrate 41 to form a P-type region 44. In this manner the Ga is introduced from the side surface into the film 46 simultaneously when introducing the Ga into the substrate 41 to diffuse the Ga outside of the opening 42, and the P-N junction 45 thus formed may become smoothly curved state having no bending point. Accordingly, the breakdown voltage of the junction 45 may be enhanced.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7966179A JPS564285A (en) | 1979-06-26 | 1979-06-26 | Manufacture of planar type semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7966179A JPS564285A (en) | 1979-06-26 | 1979-06-26 | Manufacture of planar type semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS564285A true JPS564285A (en) | 1981-01-17 |
Family
ID=13696331
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7966179A Pending JPS564285A (en) | 1979-06-26 | 1979-06-26 | Manufacture of planar type semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS564285A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4903086A (en) * | 1988-01-19 | 1990-02-20 | E-Systems, Inc. | Varactor tuning diode with inversion layer |
| WO2003061015A1 (en) * | 2002-01-15 | 2003-07-24 | Robert Bosch Gmbh | Semiconductor arrangement comprising a pn-transition and method for producing a semiconductor arrangement |
-
1979
- 1979-06-26 JP JP7966179A patent/JPS564285A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4903086A (en) * | 1988-01-19 | 1990-02-20 | E-Systems, Inc. | Varactor tuning diode with inversion layer |
| WO2003061015A1 (en) * | 2002-01-15 | 2003-07-24 | Robert Bosch Gmbh | Semiconductor arrangement comprising a pn-transition and method for producing a semiconductor arrangement |
| US7199031B2 (en) * | 2002-01-15 | 2007-04-03 | Robert Bosch Gmbh | Semiconductor system having a pn transition and method for manufacturing a semiconductor system |
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