JPS5656664A - Hybrid integrated circuit - Google Patents

Hybrid integrated circuit

Info

Publication number
JPS5656664A
JPS5656664A JP13324979A JP13324979A JPS5656664A JP S5656664 A JPS5656664 A JP S5656664A JP 13324979 A JP13324979 A JP 13324979A JP 13324979 A JP13324979 A JP 13324979A JP S5656664 A JPS5656664 A JP S5656664A
Authority
JP
Japan
Prior art keywords
type region
substrate
film
sio2
integrated circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13324979A
Other languages
Japanese (ja)
Inventor
Hiroshi Kitazaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP13324979A priority Critical patent/JPS5656664A/en
Publication of JPS5656664A publication Critical patent/JPS5656664A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D88/00—Three-dimensional [3D] integrated devices

Landscapes

  • Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE:To miniaturize a chip substantially and utilize a material for substrate effectively by a method wherein the semiconductor integrated circuit is formed on one surface of a sheet of Si substrate and a thin-film capacitor on the other, respectively, in preparing a hybrid integrated circuit. CONSTITUTION:On one surface of the P type Si substrate is formed a resistance 12 which is composed of a P<+> type region and an N type region positioned in the former and serves as a passive element, while in the same substrate 10, adjacently to the resistance, is formed a transistor 13, an active element, which is composed of an N type region, a P type region and N type region. Next, the whole surface is coated with an SiO2 film 11, an opening is made therein, an A wiring layer 14 contacting with the resistance 12 and the transistor 13 is fitted, and the whole surface is protected by another SiO2 film 15. After that, the other surface of the substrate 10 is coated with an SiO2 insulation film 16, whereon the capacitor 22 composed of a lower electrode 17 made of A, a dielectric film 18 made of SiO2, etc., an upper electrode 19 and others is formed, the electrodes 17 and 19 are provided respectively with bumps 21 of Pb-Su, etc., while the exposed side of the electrode 19 is protected by an SiO2 film 20.
JP13324979A 1979-10-15 1979-10-15 Hybrid integrated circuit Pending JPS5656664A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13324979A JPS5656664A (en) 1979-10-15 1979-10-15 Hybrid integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13324979A JPS5656664A (en) 1979-10-15 1979-10-15 Hybrid integrated circuit

Publications (1)

Publication Number Publication Date
JPS5656664A true JPS5656664A (en) 1981-05-18

Family

ID=15100186

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13324979A Pending JPS5656664A (en) 1979-10-15 1979-10-15 Hybrid integrated circuit

Country Status (1)

Country Link
JP (1) JPS5656664A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02275663A (en) * 1989-01-24 1990-11-09 Fujitsu Ltd Semiconductor device and manufacture thereof

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02275663A (en) * 1989-01-24 1990-11-09 Fujitsu Ltd Semiconductor device and manufacture thereof

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