JPS5663265A - Threshold level measuring device - Google Patents

Threshold level measuring device

Info

Publication number
JPS5663265A
JPS5663265A JP13923679A JP13923679A JPS5663265A JP S5663265 A JPS5663265 A JP S5663265A JP 13923679 A JP13923679 A JP 13923679A JP 13923679 A JP13923679 A JP 13923679A JP S5663265 A JPS5663265 A JP S5663265A
Authority
JP
Japan
Prior art keywords
memory
output
supplied
reference voltage
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13923679A
Other languages
Japanese (ja)
Inventor
Katsumi Matsumoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP13923679A priority Critical patent/JPS5663265A/en
Publication of JPS5663265A publication Critical patent/JPS5663265A/en
Pending legal-status Critical Current

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  • Measurement Of Current Or Voltage (AREA)

Abstract

PURPOSE: To realize a simple measurement of the threshold levels of several logic elements in a memory, by storing temporarily the output of the memory element and then comparing the output with that of another memory element.
CONSTITUTION: The output reference voltage of the reference voltage generating circuit 1 is supplied to the memory 2, and then the reference voltage is varied gradually. Then the output of the memory 2 is stored in the circuit 5 at the moment when the latch signal L supplied from the reading control circuit 4 is supplied to the temporary memory circuit 5. The information is read in accordance with the new reference voltage at the moment when the reading signal R is supplied to the memory 2. In this instant, the comparator 6 compares the output signal of the memory 2 with that of the circuit 5, and the output signal is produced when no coincidence is obtained between the both signals, and then applied to the display unit 3 for display.
COPYRIGHT: (C)1981,JPO&Japio
JP13923679A 1979-10-30 1979-10-30 Threshold level measuring device Pending JPS5663265A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13923679A JPS5663265A (en) 1979-10-30 1979-10-30 Threshold level measuring device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13923679A JPS5663265A (en) 1979-10-30 1979-10-30 Threshold level measuring device

Publications (1)

Publication Number Publication Date
JPS5663265A true JPS5663265A (en) 1981-05-29

Family

ID=15240639

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13923679A Pending JPS5663265A (en) 1979-10-30 1979-10-30 Threshold level measuring device

Country Status (1)

Country Link
JP (1) JPS5663265A (en)

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