JPS5674960A - Semiconductor integrated circuit - Google Patents
Semiconductor integrated circuitInfo
- Publication number
- JPS5674960A JPS5674960A JP15073279A JP15073279A JPS5674960A JP S5674960 A JPS5674960 A JP S5674960A JP 15073279 A JP15073279 A JP 15073279A JP 15073279 A JP15073279 A JP 15073279A JP S5674960 A JPS5674960 A JP S5674960A
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- layer
- integrated circuit
- polysilicon
- inverter
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D88/00—Three-dimensional [3D] integrated devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/63—Vertical IGFETs
Landscapes
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Abstract
PURPOSE:To obtain an inverter with a small area and satisfactory characteristics by vertically forming an N-channel transistor for driver and a load resistance on the surface of a substrate with regard to the VMOS integrated circuit. CONSTITUTION:An N-substrate is provided as a source and an area close to the side of a P-layer 2 is overlapped so taht ''punch-through'' phenomenon which is apt to occur in a short channel may be prevented. In addition, an N-layer 4 is overlapped to form a drain and a gate electrode 5 is provided on a slope of ''V'' groove through the intermediary of a thin gate insulative film. An electrode 5 is made of polysilicon or aluminium. A high resistance element 6 is created vertically on the surface of the substrate by vertically attaching polysilicon, etc. on the surface of the substrate. Then this element is connected to metal wiring 8 through a low-resistance area 7. In addition, each layer is covered with an insulative layer 9. If a positive potential is applied to the wiring 8 and the substrate 1 is grounded, an inverter which enables a gate 5 to output a drain 4 with an input is obtained. Besides, the length of a channel can be prolonged, thus enhancing a current drive capability.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15073279A JPS5674960A (en) | 1979-11-22 | 1979-11-22 | Semiconductor integrated circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15073279A JPS5674960A (en) | 1979-11-22 | 1979-11-22 | Semiconductor integrated circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5674960A true JPS5674960A (en) | 1981-06-20 |
Family
ID=15503195
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP15073279A Pending JPS5674960A (en) | 1979-11-22 | 1979-11-22 | Semiconductor integrated circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5674960A (en) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4851889A (en) * | 1986-12-03 | 1989-07-25 | Fuji Electric Co., Ltd. | Insulated gate field effect transistor with vertical channel |
| US5164325A (en) * | 1987-10-08 | 1992-11-17 | Siliconix Incorporated | Method of making a vertical current flow field effect transistor |
| EP0853818A4 (en) * | 1995-08-21 | 1998-11-11 | Siliconix Inc | LOW-VOLTAGE SHORT CHANNEL DUAL DIFFUSION MOS TRANSISTOR |
| US5877538A (en) * | 1995-06-02 | 1999-03-02 | Silixonix Incorporated | Bidirectional trench gated power MOSFET with submerged body bus extending underneath gate trench |
| US6096608A (en) * | 1997-06-30 | 2000-08-01 | Siliconix Incorporated | Bidirectional trench gated power mosfet with submerged body bus extending underneath gate trench |
| JP2014033119A (en) * | 2012-08-06 | 2014-02-20 | Mitsubishi Electric Corp | Semiconductor device |
-
1979
- 1979-11-22 JP JP15073279A patent/JPS5674960A/en active Pending
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4851889A (en) * | 1986-12-03 | 1989-07-25 | Fuji Electric Co., Ltd. | Insulated gate field effect transistor with vertical channel |
| US5164325A (en) * | 1987-10-08 | 1992-11-17 | Siliconix Incorporated | Method of making a vertical current flow field effect transistor |
| US5576245A (en) * | 1987-10-08 | 1996-11-19 | Siliconix Incorporated | Method of making vertical current flow field effect transistor |
| US5877538A (en) * | 1995-06-02 | 1999-03-02 | Silixonix Incorporated | Bidirectional trench gated power MOSFET with submerged body bus extending underneath gate trench |
| EP0853818A4 (en) * | 1995-08-21 | 1998-11-11 | Siliconix Inc | LOW-VOLTAGE SHORT CHANNEL DUAL DIFFUSION MOS TRANSISTOR |
| US6096608A (en) * | 1997-06-30 | 2000-08-01 | Siliconix Incorporated | Bidirectional trench gated power mosfet with submerged body bus extending underneath gate trench |
| JP2014033119A (en) * | 2012-08-06 | 2014-02-20 | Mitsubishi Electric Corp | Semiconductor device |
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