JPS568822A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS568822A JPS568822A JP8579380A JP8579380A JPS568822A JP S568822 A JPS568822 A JP S568822A JP 8579380 A JP8579380 A JP 8579380A JP 8579380 A JP8579380 A JP 8579380A JP S568822 A JPS568822 A JP S568822A
- Authority
- JP
- Japan
- Prior art keywords
- mark
- marks
- wafer
- mask
- aligned
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
Landscapes
- Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
Abstract
PURPOSE:To remarkably simply aligning process of a mask in a semiconductor device by forming an indication mark at the corresponding position of the exposed mask to a wafer. CONSTITUTION:Indication marks 19, 19' of the shape being different from first and second marks 17, 18 respectively are formed at the end of a mark installing area pattern 16 of the first exposure mask 14. On the other hand, indication marks 22, 22' are also formed at the end of a mark installing area 20 of a semiconductor wafer 11b, are then aligned initially with the respective indication marks, and are thereafter aligned with an inner profile formed by the second mark 21 and an outer profile formed by the mark 18. After they are photoetched, they are aligned with a wafer by using the second exposure mask, are photoetched, and processed several times repeatedly. New marks are sequentially formed in this case, but when the in dication mark is formed at the corresponding position of the exposure mask with the wafer, the masking work can be remarkably simply executed.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8579380A JPS568822A (en) | 1980-06-23 | 1980-06-23 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8579380A JPS568822A (en) | 1980-06-23 | 1980-06-23 | Manufacture of semiconductor device |
Related Parent Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3617975A Division JPS568490B2 (en) | 1975-03-25 | 1975-03-25 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS568822A true JPS568822A (en) | 1981-01-29 |
| JPS571890B2 JPS571890B2 (en) | 1982-01-13 |
Family
ID=13868758
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8579380A Granted JPS568822A (en) | 1980-06-23 | 1980-06-23 | Manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS568822A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59165421A (en) * | 1983-03-10 | 1984-09-18 | Nec Corp | Mark for positioning of semiconductor device |
| JPS61150268A (en) * | 1984-12-24 | 1986-07-08 | Hitachi Ltd | Manufacture of semiconductor device |
-
1980
- 1980-06-23 JP JP8579380A patent/JPS568822A/en active Granted
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59165421A (en) * | 1983-03-10 | 1984-09-18 | Nec Corp | Mark for positioning of semiconductor device |
| JPS61150268A (en) * | 1984-12-24 | 1986-07-08 | Hitachi Ltd | Manufacture of semiconductor device |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS571890B2 (en) | 1982-01-13 |
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