JPS5696845A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS5696845A
JPS5696845A JP17290879A JP17290879A JPS5696845A JP S5696845 A JPS5696845 A JP S5696845A JP 17290879 A JP17290879 A JP 17290879A JP 17290879 A JP17290879 A JP 17290879A JP S5696845 A JPS5696845 A JP S5696845A
Authority
JP
Japan
Prior art keywords
film
wiring
contact
contact hole
insulating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP17290879A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6211783B2 (2
Inventor
Toshio Kurahashi
Chuichi Takada
Toshihiko Ono
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP17290879A priority Critical patent/JPS5696845A/ja
Publication of JPS5696845A publication Critical patent/JPS5696845A/ja
Publication of JPS6211783B2 publication Critical patent/JPS6211783B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/069—Manufacture or treatment of conductive parts of the interconnections by forming self-aligned vias or self-aligned contact plugs

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
JP17290879A 1979-12-28 1979-12-28 Manufacture of semiconductor device Granted JPS5696845A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17290879A JPS5696845A (en) 1979-12-28 1979-12-28 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17290879A JPS5696845A (en) 1979-12-28 1979-12-28 Manufacture of semiconductor device

Publications (2)

Publication Number Publication Date
JPS5696845A true JPS5696845A (en) 1981-08-05
JPS6211783B2 JPS6211783B2 (2) 1987-03-14

Family

ID=15950564

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17290879A Granted JPS5696845A (en) 1979-12-28 1979-12-28 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5696845A (2)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62238647A (ja) * 1986-04-09 1987-10-19 Fujitsu Ltd 多層配線の形成方法
KR100593126B1 (ko) * 1999-12-29 2006-06-26 주식회사 하이닉스반도체 반도체 소자의 금속배선 형성방법

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4894866A (2) * 1972-03-15 1973-12-06

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4894866A (2) * 1972-03-15 1973-12-06

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62238647A (ja) * 1986-04-09 1987-10-19 Fujitsu Ltd 多層配線の形成方法
KR100593126B1 (ko) * 1999-12-29 2006-06-26 주식회사 하이닉스반도체 반도체 소자의 금속배선 형성방법

Also Published As

Publication number Publication date
JPS6211783B2 (2) 1987-03-14

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