JPS577164A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS577164A
JPS577164A JP8123380A JP8123380A JPS577164A JP S577164 A JPS577164 A JP S577164A JP 8123380 A JP8123380 A JP 8123380A JP 8123380 A JP8123380 A JP 8123380A JP S577164 A JPS577164 A JP S577164A
Authority
JP
Japan
Prior art keywords
electrodes
buffer layer
active layer
sio2
etched
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8123380A
Other languages
Japanese (ja)
Inventor
Masanori Ishii
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP8123380A priority Critical patent/JPS577164A/en
Publication of JPS577164A publication Critical patent/JPS577164A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/80FETs having rectifying junction gate electrodes

Landscapes

  • Junction Field-Effect Transistors (AREA)

Abstract

PURPOSE:To prevent the thickness of source and drain electrodes from being locally reduced, wire disconnection in the electrodes and the migration of electrode material by a method wherin the side of an active layer is formed in the shape of a taper continuous to a portion of the surface of a buffer layer. CONSTITUTION:A buffer layer 2 without the addition of Cr and an N type active layer 3 are formed on semi-insulated GaAs 1 with Cr by the epitaxial method, and SiO2 14 is provided. Photoresist 15 is employed as a mask, while the active layer 3 is mesa-etched. Etching in the transverse direction is stopped at about the end portion of SiO2 14 and that in the vertical direction is stopped when the surface of the buffer layer 2 has been etched by the specified thickness. As a result, the side face becomes taper-shaped. After this, the conventional method is used to develop and expand electrodes 17, 18 made of Au-Ge alloy from the upper face of the active layer 3 to its side so as to make the electrodes extend up to the buffer layer 2, and the electrodes are covered with SiO2 19, before being provided with an Al gate electrode 20 to complete the manufacturing process. With this construction, the yield and reliability of the device are improved, while the leakage current via the buffer layer is minimized, thereby improving its high frequency characteristics.
JP8123380A 1980-06-16 1980-06-16 Semiconductor device Pending JPS577164A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8123380A JPS577164A (en) 1980-06-16 1980-06-16 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8123380A JPS577164A (en) 1980-06-16 1980-06-16 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS577164A true JPS577164A (en) 1982-01-14

Family

ID=13740726

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8123380A Pending JPS577164A (en) 1980-06-16 1980-06-16 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS577164A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59193947A (en) * 1983-04-19 1984-11-02 Ishikawajima Harima Heavy Ind Co Ltd Flame retardant resin in oxygen
EP0614215A1 (en) * 1993-03-05 1994-09-07 Alcatel N.V. Process for forming a metal contact on a relief of a semicondactor substrate, including a step of flowing a photosensitive resin layer
KR100333155B1 (en) * 1994-09-16 2002-11-21 가부시키가이샤 한도오따이 에네루기 켄큐쇼 Thin film semiconductor device and manufacturing method

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59193947A (en) * 1983-04-19 1984-11-02 Ishikawajima Harima Heavy Ind Co Ltd Flame retardant resin in oxygen
EP0614215A1 (en) * 1993-03-05 1994-09-07 Alcatel N.V. Process for forming a metal contact on a relief of a semicondactor substrate, including a step of flowing a photosensitive resin layer
FR2702306A1 (en) * 1993-03-05 1994-09-09 Alcatel Nv Method of self-aligning a metal contact on a substrate of semiconductor material
KR100333155B1 (en) * 1994-09-16 2002-11-21 가부시키가이샤 한도오따이 에네루기 켄큐쇼 Thin film semiconductor device and manufacturing method

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