JPS5772340A - Quality evaluating method for single crystal silicon wafer - Google Patents

Quality evaluating method for single crystal silicon wafer

Info

Publication number
JPS5772340A
JPS5772340A JP55148699A JP14869980A JPS5772340A JP S5772340 A JPS5772340 A JP S5772340A JP 55148699 A JP55148699 A JP 55148699A JP 14869980 A JP14869980 A JP 14869980A JP S5772340 A JPS5772340 A JP S5772340A
Authority
JP
Japan
Prior art keywords
single crystal
crystal silicon
silicon wafer
temperature
wafer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP55148699A
Other languages
English (en)
Other versions
JPS6135504B2 (ja
Inventor
Hidekatsu Ito
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP55148699A priority Critical patent/JPS5772340A/ja
Publication of JPS5772340A publication Critical patent/JPS5772340A/ja
Publication of JPS6135504B2 publication Critical patent/JPS6135504B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H10P95/40—Treatments of semiconductor bodies to modify their internal properties, e.g. to produce internal imperfections
    • H10P95/402—Treatments of semiconductor bodies to modify their internal properties, e.g. to produce internal imperfections of silicon bodies

Landscapes

  • Sampling And Sample Adjustment (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
JP55148699A 1980-10-23 1980-10-23 Quality evaluating method for single crystal silicon wafer Granted JPS5772340A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55148699A JPS5772340A (en) 1980-10-23 1980-10-23 Quality evaluating method for single crystal silicon wafer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55148699A JPS5772340A (en) 1980-10-23 1980-10-23 Quality evaluating method for single crystal silicon wafer

Publications (2)

Publication Number Publication Date
JPS5772340A true JPS5772340A (en) 1982-05-06
JPS6135504B2 JPS6135504B2 (ja) 1986-08-13

Family

ID=15458613

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55148699A Granted JPS5772340A (en) 1980-10-23 1980-10-23 Quality evaluating method for single crystal silicon wafer

Country Status (1)

Country Link
JP (1) JPS5772340A (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60224239A (ja) * 1984-04-20 1985-11-08 Fujitsu Ltd 薄膜の欠陥検出方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60224239A (ja) * 1984-04-20 1985-11-08 Fujitsu Ltd 薄膜の欠陥検出方法

Also Published As

Publication number Publication date
JPS6135504B2 (ja) 1986-08-13

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