JPS5773953A - Production of semiconductor device - Google Patents

Production of semiconductor device

Info

Publication number
JPS5773953A
JPS5773953A JP55149595A JP14959580A JPS5773953A JP S5773953 A JPS5773953 A JP S5773953A JP 55149595 A JP55149595 A JP 55149595A JP 14959580 A JP14959580 A JP 14959580A JP S5773953 A JPS5773953 A JP S5773953A
Authority
JP
Japan
Prior art keywords
electrode
height
bump electrode
plating
bump
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55149595A
Other languages
English (en)
Inventor
Setsuo Hiraoka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Home Electronics Ltd
NEC Corp
Original Assignee
NEC Home Electronics Ltd
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Home Electronics Ltd, Nippon Electric Co Ltd filed Critical NEC Home Electronics Ltd
Priority to JP55149595A priority Critical patent/JPS5773953A/ja
Publication of JPS5773953A publication Critical patent/JPS5773953A/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/069—Manufacture or treatment of conductive parts of the interconnections by forming self-aligned vias or self-aligned contact plugs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/012—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps

Landscapes

  • Electrodes Of Semiconductors (AREA)
  • Electroplating Methods And Accessories (AREA)
JP55149595A 1980-10-25 1980-10-25 Production of semiconductor device Pending JPS5773953A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55149595A JPS5773953A (en) 1980-10-25 1980-10-25 Production of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55149595A JPS5773953A (en) 1980-10-25 1980-10-25 Production of semiconductor device

Publications (1)

Publication Number Publication Date
JPS5773953A true JPS5773953A (en) 1982-05-08

Family

ID=15478633

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55149595A Pending JPS5773953A (en) 1980-10-25 1980-10-25 Production of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5773953A (ja)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59136950A (ja) * 1983-01-27 1984-08-06 Seiko Instr & Electronics Ltd バンプ型電極の形成方法
JPS60219741A (ja) * 1984-04-17 1985-11-02 Seiko Instr & Electronics Ltd 半導体装置の製造方法
US5053851A (en) * 1991-01-14 1991-10-01 International Business Machines Corp. Metal bump for a thermal compression bond and method for making same
US5059553A (en) * 1991-01-14 1991-10-22 Ibm Corporation Metal bump for a thermal compression bond and method for making same
EP0877419A3 (en) * 1997-05-09 1999-08-18 Mcnc Methods of electroplating solder bumps of uniform height on integrated circuit substrates
US6162344A (en) * 1998-07-22 2000-12-19 Novellus Systems, Inc. Method of electroplating semiconductor wafer using variable currents and mass transfer to obtain uniform plated layer

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59136950A (ja) * 1983-01-27 1984-08-06 Seiko Instr & Electronics Ltd バンプ型電極の形成方法
JPS60219741A (ja) * 1984-04-17 1985-11-02 Seiko Instr & Electronics Ltd 半導体装置の製造方法
US5053851A (en) * 1991-01-14 1991-10-01 International Business Machines Corp. Metal bump for a thermal compression bond and method for making same
US5059553A (en) * 1991-01-14 1991-10-22 Ibm Corporation Metal bump for a thermal compression bond and method for making same
EP0877419A3 (en) * 1997-05-09 1999-08-18 Mcnc Methods of electroplating solder bumps of uniform height on integrated circuit substrates
US6117299A (en) * 1997-05-09 2000-09-12 Mcnc Methods of electroplating solder bumps of uniform height on integrated circuit substrates
US6162344A (en) * 1998-07-22 2000-12-19 Novellus Systems, Inc. Method of electroplating semiconductor wafer using variable currents and mass transfer to obtain uniform plated layer

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