JPS578853A - Digital computer - Google Patents

Digital computer

Info

Publication number
JPS578853A
JPS578853A JP8234880A JP8234880A JPS578853A JP S578853 A JPS578853 A JP S578853A JP 8234880 A JP8234880 A JP 8234880A JP 8234880 A JP8234880 A JP 8234880A JP S578853 A JPS578853 A JP S578853A
Authority
JP
Japan
Prior art keywords
task
registers
program
counters
general
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8234880A
Other languages
Japanese (ja)
Inventor
Asao Yamanishi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP8234880A priority Critical patent/JPS578853A/en
Publication of JPS578853A publication Critical patent/JPS578853A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/461—Saving or restoring of program or task context
    • G06F9/462—Saving or restoring of program or task context with multiple register sets

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)

Abstract

PURPOSE:To eliminate the need for the stand-by and restoration of registers, counters, etc., in changing tasks, by providing pairs of registers and counters determining program operation and by assigning one pair of a register and a counter to each task. CONSTITUTION:When some task is in operation, one group of a general rgister 5a, a program counter 6a, and a program status register 7a, for example, is occupied by the task in operation. In this state, the number of a task to be executed after a change is outputted to a signal line 8. A decoder 9 decodes this number to selcet one of general registers 5a-5n which corresponds to the task through an output line 10, and inputs its output data to a logical operating circuit 4. The output of this circuit 4 is also stored in the general register corresponding to the task. Similarly, corresponding program counters 6a-6n and program status registers 7a-7n are selected.
JP8234880A 1980-06-17 1980-06-17 Digital computer Pending JPS578853A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8234880A JPS578853A (en) 1980-06-17 1980-06-17 Digital computer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8234880A JPS578853A (en) 1980-06-17 1980-06-17 Digital computer

Publications (1)

Publication Number Publication Date
JPS578853A true JPS578853A (en) 1982-01-18

Family

ID=13772057

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8234880A Pending JPS578853A (en) 1980-06-17 1980-06-17 Digital computer

Country Status (1)

Country Link
JP (1) JPS578853A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59191654A (en) * 1983-04-15 1984-10-30 Hitachi Ltd processing equipment
JPH02297222A (en) * 1989-05-11 1990-12-07 Nec Corp Central processing unit
WO1994015287A3 (en) * 1992-12-23 1994-08-18 Centre Electron Horloger Multi-tasking low-power controller

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59191654A (en) * 1983-04-15 1984-10-30 Hitachi Ltd processing equipment
JPH02297222A (en) * 1989-05-11 1990-12-07 Nec Corp Central processing unit
WO1994015287A3 (en) * 1992-12-23 1994-08-18 Centre Electron Horloger Multi-tasking low-power controller
US5630130A (en) * 1992-12-23 1997-05-13 Centre Electronique Horloger S.A. Multi-tasking low-power controller having multiple program counters

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