JPS58114202A - プログラム回路 - Google Patents

プログラム回路

Info

Publication number
JPS58114202A
JPS58114202A JP21274881A JP21274881A JPS58114202A JP S58114202 A JPS58114202 A JP S58114202A JP 21274881 A JP21274881 A JP 21274881A JP 21274881 A JP21274881 A JP 21274881A JP S58114202 A JPS58114202 A JP S58114202A
Authority
JP
Japan
Prior art keywords
counter
circuit
outputs
output
terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP21274881A
Other languages
English (en)
Japanese (ja)
Other versions
JPS623442B2 (de
Inventor
Yusaku Matsubara
松原　勇作
Shinichi Obara
小原　信一
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Electric Works Co Ltd
Original Assignee
Matsushita Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Works Ltd filed Critical Matsushita Electric Works Ltd
Priority to JP21274881A priority Critical patent/JPS58114202A/ja
Publication of JPS58114202A publication Critical patent/JPS58114202A/ja
Publication of JPS623442B2 publication Critical patent/JPS623442B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B19/00—Program-control systems
    • G05B19/02—Program-control systems electric
    • G05B19/04—Program control other than numerical control, i.e. in sequence controllers or logic controllers
    • G05B19/045—Program control other than numerical control, i.e. in sequence controllers or logic controllers using logic state machines, consisting only of a memory or a programmable logic device containing the logic for the controlled machine and in which the state of its outputs is dependent on the state of its inputs or part of its own output states, e.g. binary decision controllers, finite state controllers

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Automation & Control Theory (AREA)
  • Programmable Controllers (AREA)
JP21274881A 1981-12-28 1981-12-28 プログラム回路 Granted JPS58114202A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP21274881A JPS58114202A (ja) 1981-12-28 1981-12-28 プログラム回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP21274881A JPS58114202A (ja) 1981-12-28 1981-12-28 プログラム回路

Publications (2)

Publication Number Publication Date
JPS58114202A true JPS58114202A (ja) 1983-07-07
JPS623442B2 JPS623442B2 (de) 1987-01-24

Family

ID=16627764

Family Applications (1)

Application Number Title Priority Date Filing Date
JP21274881A Granted JPS58114202A (ja) 1981-12-28 1981-12-28 プログラム回路

Country Status (1)

Country Link
JP (1) JPS58114202A (de)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62145303A (ja) * 1985-12-19 1987-06-29 Arubatsuku Service Kk シ−ケンス制御回路
JPH01136212A (ja) * 1987-11-24 1989-05-29 Hitachi Ltd シーケンス制御プログラムのテスト方法

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62145303A (ja) * 1985-12-19 1987-06-29 Arubatsuku Service Kk シ−ケンス制御回路
JPH01136212A (ja) * 1987-11-24 1989-05-29 Hitachi Ltd シーケンス制御プログラムのテスト方法

Also Published As

Publication number Publication date
JPS623442B2 (de) 1987-01-24

Similar Documents

Publication Publication Date Title
JP3287990B2 (ja) バースト長さ検出回路
JPS58114202A (ja) プログラム回路
CA2022586A1 (en) Scan converter control circuit having memories and address generator for generating zigzag address signal supplied to the memories
JPS6026477B2 (ja) 電気パルスの発生および処理のための方法
JPH033200A (ja) 半導体記憶装置
JPS58181346A (ja) デ−タ多重化回路
JPH03261881A (ja) 波形形成装置
JP3154098B2 (ja) メモリ素子のリフレッシュ回路
KR100455368B1 (ko) 버스트카운터및그캐리발생방법
SU1228288A1 (ru) Многоканальный формирователь кодов
SU1280449A2 (ru) Программатор дл записи информации в полупроводниковые элементы пам ти
SU1388921A1 (ru) Устройство дл контрол числа циклов работы оборудовани
JP2599805B2 (ja) Ｄｍａコントローラ
SU1095167A1 (ru) Устройство дл синтеза речи
SU809345A1 (ru) Устройство дл управлени блокомпАМ Ти
JPS6110231Y2 (de)
SU1571786A1 (ru) Датчик испытательных текстов
SU1040526A1 (ru) Запоминающее устройство с самоконтролем
JPH0447855B2 (de)
JPS59152596A (ja) 記憶回路
JPH0365727A (ja) マイクロプログラム格納方式
JPH04278481A (ja) プログラマブルロジックデバイス
JPH01319374A (ja) 電荷転送デバイス用論理信号発生及びシーケンス回路
JPS58166598A (ja) メモリ装置
JPS63298450A (ja) デ−タ処理装置