JPS59201424A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To make flat the surface and thereby prevent disconnection by sequentially providing wirings and resist pattern through interlayer insulating film on a semiconductor substrate, overlapping an insulating film in the same thickness as the wiring by the photo CVD method and exfoliating the resist. CONSTITUTION:The interlayer insulating films 12 and Al 13 are formed sequentially on a P type Si substrate 11 and the A wiring 15 is formed by a resist pattern 14. Then, an SiO2 16 is formed thereon by the photo CVD method in the same thickness as the wiring 15. Moreover, an interlayer insulating film 17 is provided on the entire part and an Al wiring 18 are formed over the film 17 to form a semiconductor device. According to this constitution, after forming the resist 14, the SiO2 film 16 is formed at a low temperature by the photo CVD method, the resist 14 does not dissolve and the surface can be made flat by leaving the SiO2 film 16 around the wiring 15 by the lift-off. Accordingly, disconnection of wiring can be prevented.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a method of manufacturing a semiconductor device in which the planarization of the cross section is completely achieved.

[Technical background of the invention]

As is well known, there is a recent tendency for wiring to become multi-layered as the density of transponders increases.

Conventionally, semiconductor devices have all multilayered wiring.

For example, it is manufactured as shown in FIGS. 1(,) to (c) VC. First, for example, after forming a first interlayer insulating film 2 and a metal layer 3 on a semiconductor substrate 1, a resist pattern 4 is entirely formed at a predetermined position on the metal layer 3 (see Fig. 1).
). Subsequently, the metal layer 3 is selectively etched away using this resist pattern 4 mask to form a first wiring 5 (as shown in FIG. 1(b)). Then,
After peeling off the resist pattern 4, a second interlayer insulating film 6'f is formed on the entire surface, and a second wiring is further formed on this interlayer insulating film 6 so as to cross the portion corresponding to the first wiring 5. 7 is formed to manufacture a semiconductor device (as shown in FIG. 1(C)).

[Problems with background technology]

However, according to the conventional manufacturing method described above,
After forming the entire first wiring 4 on the film 2 with a layer gap of
C In order to form the second interlayer insulating film 6, a portion of the second interlayer insulating film 6 corresponding to the wiring 5 becomes convex, and a second wiring 7'ff: is formed on this interlayer insulating film 6. However, there is a risk that a break may occur in the second wiring 7 connected to the first wiring 5.

[Purpose of the invention]

The present invention has been made in view of the above circumstances.

The overall object of the present invention is to provide a method for manufacturing a semiconductor device that can completely flatten the surface and completely prevent disconnection of wiring.

[Summary of the invention]

In the present invention, after sequentially forming interconnections, shield patterns, and cyst patterns by forming an IPI interlayer insulating film on a semiconductor substrate, an insulating film with a thickness approximately equal to that of the interconnections is formed on the entire surface by CVD method. Furthermore, by completely removing the Renost pattern and lifting off the insulating film on the pattern, the surface can be flattened and the disconnection of the wiring formed on the wiring via the insulating film can be completely prevented. .

[Embodiments of the invention]

Hereinafter, an embodiment of the present invention will be explained based on FIGS. Layer 13 whole form cough and further i
A resist pattern 14 was formed on Jso 13 (second
2(a), the first A4 wiring 15 was formed (as shown in FIG. 2(b)). Next, optical CVD (Chem
A 5i02 film 16 having the same thickness as the AIl greening 15 was formed on the entire surface at 100° C. by the ical vapor deposition method (as shown in FIG. 2(C)). Next, the resist pattern 14 was removed. At this time, the Si02 film 16 on the groove turn 14 was also removed at the same time (lift-off). Furthermore, a second interlayer insulating film 17 is formed on the entire surface.
After forming the interlayer insulating film 17, a second A7 wiring 18 was formed to complete the manufacturing of the semiconductor device (as shown in FIG. 2(d)).

According to the present invention, after forming the Renost pattern 14 on the first A7 wiring 15 on the first interlayer insulating film 12, a layer of the same thickness as the wiring 15 is formed over the entire surface at a low temperature by photo-CVD. Since the 5in2 film 16 is formed, the 5i film is formed on the Lennost pattern 14 without dissolving the pattern 14.
An n2 film 16 is formed. Furthermore, when removing the Rennost pattern 14, the 5i02 film 1G on the pattern 14 can also be riffed off, and the 5i02 film 16 can remain around the first wiring 15, making it possible to flatten the entire surface. Therefore, the second AI wiring 187!--can be formed through the entire second interlayer insulating film 17 without causing any breakage.

Moreover, since the surface is flat, it will be easy to form a three-dimensional IC when it becomes necessary in the future.

In the above example, A7 was used as the material for the wiring, but other materials such as All/Si and MO were also used.

Metals such as W, T+, MoSi2. νVS A2
, T i S i.

Socide or polycrystalline silicon, etc., may also be used.

In addition, in the above example, the A7 wiring was formed on a p-type Si substrate via the first interlayer dielectric film, but the invention is not limited to this. An A7 wiring may be formed on the layer via an interlayer insulating film.

〔Effect of the invention〕

As described in detail above, the VC deflection of the present invention can completely prevent disconnection of wiring (and can provide a highly reliable method of manufacturing a semiconductor device).

[Brief explanation of drawings]

FIGS. 1(a) to (c) are cross-sectional sections showing the conventional method for manufacturing a semiconductor device in order of process, and FIGS. It is a sectional view 'f' shown in order of process j. 1 no...p'! 4-81 Substrate (semiconductor base)-1
2゜17...Interlayer insulating film, 13...kl layer, 14
...Regist Nog Turn, No 5
, 1 8 ... 7, 13 β 21 (
, 16...S r O2 clothing (insulating film) 0

Claims (1)

[Claims] A step of sequentially forming wiring and a resist pattern on a semiconductor substrate via an interlayer insulating film, a step of forming an insulating film with approximately the same thickness as the above-mentioned wiring on the entire surface by photo-CVD method, and a step of completely removing the resist pattern. A method of manufacturing a semiconductor device, comprising the step of: lifting off an insulating film on the nozzle.