JPS60201717A - Flip-flop circuit - Google Patents

Abstract

PURPOSE:To prevent a malfunction when a power supply has a short break due to noises by supplying the complementary output of an FF circuit to each input terminal of a differential amplifier to which a capacity and discharging transistor are connected. CONSTITUTION:When a set signal is supplied to an input terminal 3, transistors TR7 and 8 are kept on and off respectively by a normal FF action to deliver an H level through an output terminal 5. At the same time, TR15 and 14 of a differential amplifier are turned on and off together with TR17 and 16 turned on and off respectively. Thus the electric charge charged so far to a capacitor 26 is flowed continuously to the base of the TR7 via a resistance 11 even through a power supply is unstable with noises. Then the TR7 is turned on when the power supply is recovered. Thus a state set before generation of noises can be held to prevent a malfunction of an FF circuit.

Description

DETAILED DESCRIPTION OF THE INVENTION (Technical Field) The present invention relates to a flip-flop circuit used in a place where noise is likely to occur.

(Prior Art) A conventional flip-flop circuit, as shown in FIG.
Resistors 10-14 and transistors 6-9 are connected between power supply line 2 and ground line 1.

It is connected in parallel with the transistor 6.7, the cent signal input terminal 3 is connected to the base of the transistor 60, and the base of the transistor is connected to the collectors of the transistors 8 and 9 via a resistor 11. transistors 8 and 9
are connected in parallel, the reset signal input terminal 4 is connected to the base of the transistor 90, and the base of the transistor 80 is connected to the collectors of the transistors 6 and 7 via the resistor 10. The output terminal 5 is connected to the connection point between the collectors of the transistors 8 and 9 and the resistors 11 and 13.

The base voltage of each transistor is as shown in FIG. If the potential difference between the power line 2 and the ground line 1 is stable, there is no problem in the operation of this flip-flop circuit, but in the case of automotive electrical components, the potential level of the power line 2 may change due to noise from ignition sparks, etc. falls to near the ground potential level, cutting off transistors 6-9. In this case, when power supply line 2 returns to its original potential level, transistor 60 base or transistor 9
If a set signal or a reset signal is not input to the base of the flip-flop circuit, it is not known which of the transistors 7 or 8 becomes conductive first, so the output 5 of the flip-flop circuit is not uniquely determined, which may cause malfunction. there were.

(Object of the Invention) An object of the present invention is to provide a flip-flop circuit having excellent noise resistance and used in a place where noise is likely to occur.

(Structure, operation, and effect of the present invention) According to the present invention, first and second transistors each having a collector connected to a power supply line via a load;
a first resistor connecting the base of the first transistor to the collector of the second transistor; and a second resistor connecting the base of the second transistor to the collector of the first transistor.
with resistance.

Based on the first capacitor connected between the collector of the first transistor and the reference potential, the second capacitor connected between the collector of the second transistor and the reference potential, and the collector output of the first transistor. a third transistor whose base receives the collector output of the second transistor and whose emitter is connected to the power supply line via the current source; W: a fourth transistor that forms a differential amplifier together with the transistor W; The emitter is connected in parallel to the second capacitor, and the base is connected to the fourth capacitor.
and a sixth transistor receiving the collector output of the transistor.

In the Aritz flop circuit of the present invention, the first. The second capacitor is connected to the first or Since the capacitor No. 2 stores charge, this charge serves to turn on the first or second transistor and maintain the previous state when the power is restored. These two capacitors can prevent malfunctions of the Aritz flop circuit caused by instability of the power supply.

(Example of the invention) The invention will now be explained in more detail with reference to one drawing.

FIG. 3 shows an embodiment of the present invention.

Arrival flops consisting of transistors 6 to 9 and resistors 10 to 13 are connected in the same manner as in the conventional example. The collector outputs of transistors 6 and 7 are applied to the base of transistor 15, and the collector outputs of transistors 8 and 9 are applied to the base of transistor 14. The emitters of the transistors 14 and 15 are connected in common and connected to the power supply line 2 via a resistor 20 to form a differential amplifier tube. A capacitor 26 is connected between the collectors of the transistors 8 and 9 and a reference potential, and the collector-emitter of the transistor 16 is connected in parallel to this capacitor 26. Similarly, a capacitor 27 is connected between the collector of the transistor 6.7 and the reference potential, and the collector of the transistor 17 is connected in parallel to this capacitor 27.
The emitters are connected. The collector output of transistor 14 is taken out by resistor 18 and applied to the base of transistor 16. The collector output of transistor 15 is also taken out by resistor 19 and applied to the base of transistor 17.

In the normal operation of the Aritz flop circuit, a set signal is input to the set signal input terminal 3, the transistor 6 becomes conductive, and the transistor 8 is turned off. Therefore, if the reset signal is not input to the reset signal input terminal 4, the collectors of the transistors 8 and 9 will be at a high potential, making the transistor 7 conductive, and the set signal will disappear and the transistor 6 will be cut off. Since it remains conductive and the collector voltage is low, transistor 8 remains cut off. Therefore, the output terminal 5 is maintained at a high potential. Conversely, if a reset signal is input to the reset signal input terminal 4 in this state, the transistor 9 becomes conductive and the collector voltage becomes a low potential. Therefore, the transistor 7 is cut off, the collector voltage of the transistors 6 and 7 becomes low, and the transistor 8 becomes conductive, and the output terminal 5 is maintained at a low potential even after the reset signal disappears.

In this circuit, if noise occurs and the power supply 2 becomes unstable, causing each transistor to be cut off, first, if the set signal is input and the output is at a high potential, each transistor will be cut off. In the previous state, transistors 15 and 17 are conductive, capacitor 22 is discharged and no charge is stored, but capacitor 2111
．． ) Since the transistors 14 and 16 are cut-on, they are charged to a high potential. Therefore, even if each transistor is cut off, the electric charge stored in the capacitor 21 flows through the resistor 11 to the transistor 70, making the transistor 7 conductive.

Therefore, when the power is restored, the transistors are in a conductive state, so the transistors 8 and 9 are cut off, and the output terminal 5 is maintained at a high potential. Conversely, when the reset signal is applied, transistors 14 and 16 are in a conductive state, and capacitor 21 is discharged and no charge is stored, but conversely, capacitor 22 is charged to a high potential. When the power supply becomes unstable and each transistor is cut off, the charge stored in the capacitor 22 flows through the resistor 10 to the base of the transistor 80, making the transistor 8 conductive. Therefore, when the power is restored, transistor 8 is in a conductive state, transistors 6.7 are cut on, and output terminal 5 is maintained at a low potential.

As described above, the charges stored in the two capacitors can prevent the flip-flop circuit from malfunctioning.

#44 Figure 4 shows an embodiment in which the collector outputs of transistors 6 and 7 are applied to the base of transistor 150 via transistor 24, and the collector outputs of transistors 8 and 9 are applied to the base of transistor 14 via transistor 23. The basic operation is the same as that of the flip-flop circuit shown in FIG.

According to the present invention, it is possible to effectively prevent malfunctions of flip-flop circuits used in locations where noise is likely to occur, such as automotive electrical components.

[Brief explanation of drawings]

Figure 1 is a circuit diagram of a conventional flip-flop circuit, and Figure 2 is a circuit diagram of a conventional flip-flop circuit.
The figure is a diagram of the voltage waveform. FIG. 3 is a circuit diagram of a flip-flop circuit according to one embodiment of the present invention, and FIG. 4 is a circuit diagram of a flip-flop circuit according to another embodiment of the present invention. Ground potential line...l, power line...
・2. Set signal input terminal...3. Reset signal input terminal...4. Output terminal - 5. Transistor...6~9.14~17,2312
4. Resistance...lO~13°18~20. Capacitor・・・26,27 Fig. 1 Fig. 3

Claims (1)

[Claims] a bistable circuit having first and second input terminals and first and second output terminals; #first and second capacitive elements connected to the first and second output terminals, respectively; A differential amplifier circuit that uses signals from the first and second output terminals as a long signal and outputs first and second output signals, and collectors and terminals for the first and second capacitive elements, respectively.
1. A flip-flop circuit comprising first and second transistors whose emitters are connected in parallel and whose bases receive first and second output signals.