JPS6033754A - Pilot signal eliminating circuit - Google Patents

Abstract

PURPOSE:To eliminate surely a stereo pilot signal by modulating plural outputs of a PLL circuit oscillated in synchronizing with the stereo pilot signal, adjusting the level, then subtracting the result after synthesizing. CONSTITUTION:The PLL circuit 8 generates a signal in synchronizing with the stereo pilot signal included in a stereo composite signal and a harmonic signal. A level detection circuit 3 detects the stereo pilot signal and controls level modulating circuits 91-9n modulating the output signal of the PLL circuit. Level ratio setting circuits 101-10n hold the levels of the modulated signals to the prescribed relation and the result is synthesized by a synthesis circuit 11. A subtraction circuit 6 subtracts the synthesis signal from a composite signal to eliminate the stereo pilot signal.

Description

DETAILED DESCRIPTION OF THE INVENTION (a) Field of Industrial Application The present invention is directed to
The present invention relates to a pilot signal cancellation circuit for canceling a KIIz stereo pilot signal.

(b) The conventional stereo composite signal is a stereo sum signal (L +
R), an amplitude-modulated stereo difference signal CI, -R), and a stereo pilot signal (P). Thus, the stereo sum signal and the stereo difference signal are demodulated in a stereo decoder based on a 38I (Hz signal) synchronized with the stereo pilot signal to obtain a left stereo signal (L) and a right stereo signal (R). In that case, it is desirable that the demodulated signal does not contain a stereo pilot signal, and a conventional pilot signal canceling circuit has been provided at the input end of a stereo decoder. This shows a stereo demodulation circuit comprising a circuit, in which (1) is an input terminal to which a stereo composite signal is applied, and (2) is a circuit that generates a 19 KHz signal and a 38 KHz signal synchronized with a stereo pilot signal included in the stereo composite signal. (3) is the PLL circuit (2)
), a level detection circuit (4) detects the level of the stereo pilot signal in the stereo composite signal using the 19KElz signal obtained from the PLL circuit (2), according to the output signal of the level detection circuit (3); ), (5) is a waveform shaping circuit that shapes the waveform of the output signal of the level modulation circuit (4), and (6) is included in the stereo composite signal. stereo pilot signal,
a subtraction circuit that subtracts the level-controlled 19KHz signal obtained from the waveform shaping circuit (5) to eliminate the stereophonic signal; and (7) the subtraction circuit (7).
This is a stereo decoder that generates left and right stereo signals using the output signal of 6) and the 38Ktlz signal which is the output signal of the PLL circuit (2). The PLL circuit (2) internally includes a phase comparator, a ronnograph filter, a voltage controlled oscillator, a branching unit, etc., and generates a signal synchronized with the stereo pilot signal, but since it is well known, we will not explain its details. is omitted. The level detection circuit (3) is constituted by, for example, a synchronous detection circuit, and generates a DC signal corresponding to the level of the stereo pilot signal at its output terminal. The level modulation circuit (4) uses the DC signal to convert the PLL circuit (
2) change the level of the 19KHz signal generated from
It generates a level-adjusted 19KHz signal at the output end. The waveform shaping circuit (5) is for converting the 19KHz rectangular wave signal obtained at the output terminal of the level modulation circuit (4) into a 19I (Hz sine wave signal).
It is composed of C parallel co-retraction paths. Subtraction circuit (6
) is arranged to subtract the stereo composite signal and the 19Ktlz sine wave signal and eliminate the stereo pilot signal, and as a result, the stereo decoder (7) receives the stereo composite signal without the stereo decoder (4). will be applied.

The pilot signal cancellation circuit shown in Fig. 1 has the advantage that it has a higher cancellation effect compared to the case where the stereo pilot signal is canceled using simply a level-modulated 19Ktlz rectangular wave signal, but on the other hand, it uses an LC parallel resonant circuit as a waveform shaping circuit. This has the disadvantage that the erasing effect deteriorates due to element variations and changes in temperature characteristics that cause phase changes and changes in characteristics, and the coil (L) cannot be integrated into an IC (integrated circuit).
(C) Purpose of the Invention The present invention has been made in view of the above-mentioned points, and has the disadvantage that it is not suitable for IC implementation because it requires a stereo pilot signal. It is an object of the present invention to provide a pilot signal cancellation circuit that has a high cancellation effect and is easy to integrate into an IC.

B) Structure of the Invention The pilot signal cancellation circuit according to the present invention includes a PLLN path that generates a first signal synchronized with a stereo pilot signal included in a stereo composite signal and a harmonic signal of the first signal, and a PLLN path that generates a harmonic signal of the first signal; a level detection circuit that detects the level of a signal; a plurality of level modulation circuits that modulates the level of the first signal and its harmonic signals according to an output signal of the level detection circuit; and an output signal of the level modulation circuit. a level ratio setting circuit for setting the levels of the signals in a predetermined relationship with each other; a synthesis circuit for synthesizing the output signals of the level ratio setting circuit; and an operation for adding or subtracting the output signal of the synthesis circuit and the stereo composite signal. It consists of a circuit.

(e) Embodiment FIG. 2 is a circuit diagram showing an embodiment of the present invention, and (8) shows a 19Kk square wave signal (first
signal), 38 KJIz rectangular wave signal, and a PLL circuit that generates an odd harmonic signal of the first signal, (91)
is determined by using the output signal of the level detection circuit (3).
a second level modulation circuit that performs signal level modulation, (9,)
Similarly, 57KHz obtained from the PLL circuit (8)
A second level modulation circuit (9n) that performs level modulation of a rectangular wave signal (third harmonic of the first signal) is a (19xn) KHz (where n is an odd number) rectangular signal obtained from the PLL circuit (8). an n-th level modulation circuit that performs level modulation of a wave signal (n-th harmonic of the first signal), (101 or the output signal of the said rubel modulation circuit (91)), which outputs the output signal as "level l"; circuit, (ioJ is a second level ratio setting circuit that outputs the output signal of the second level modulation circuit (92) as a "level ratio", (10n) is a "level ratio setting circuit" that outputs the output signal of the nth level modulation circuit (9n), and (Jl) is a synthesis circuit that synthesizes the output signals of the first to n-th level ratio setting circuits (10,) to (Ion). The parts common to FIG. The harmonic signals are transmitted to the first to nth level modulation circuits (9I) to (9n), respectively.
), the level is modulated by a signal corresponding to the level of the stereo pyro 21 obtained from the level detection circuit (3). Therefore, the first to nth level modulation circuits (9
The levels of the output signals 1) to (9n) are proportional to the level of the stereo signal in the composite signal. By the way, the first signal is a 19 KHz rectangular wave signal, which includes odd harmonic components.

It is known that the level of the harmonic component is 1 (where n is the order of the harmonic signal) of the fundamental wave of 19 K)lz. For example, the level of the third harmonic component of 571 (Hz) is a, and the level of the fifth harmonic component of 195 KHz is higher.
9,) should be used as is as the cancellation signal.
The odd-order harmonic components remain in the stereo composite signal, which is inconvenient.

The level-controlled 19I (Hz) rectangular wave signal which is the output signal of the 1st Lebel modulation circuit (9,) is applied to the 1st Lebel ratio setting circuit (10,). ) is output as a "level l" signal.

Further, the output signal of the second level modulation circuit (9□), a 57 KHz rectangular wave signal which has been subjected to a certain level control, is applied to the second level ratio setting circuit (102), and the second level ratio setting circuit (102) is applied to the second level ratio setting circuit (102). It is output from the circuit (102) as a "level mahjong" signal. Similarly, the nth level ratio setting circuit (Ion
) generates a (19Xn)Kllz rectangular wave signal "above the r level".

The synthesis circuit (lυ is the first to nth level ratio setting circuit (1
0, ) to (Ion) are synthesized. Therefore, the third harmonic component of "level blue" in the first signal applied from the first rubel ratio setting circuit (lot) and the second
The "above level" 57KHz rectangular wave signal applied from the level ratio setting circuit (102) is canceled, and in the same way, the third harmonic component of "level 1" in the first signal and the nth level ratio setting The "above level"(19'Xn) KHz square wave signal outputted from the circuit (Ion) is canceled, and in the end, only the 19 KHz component in the first signal is generated at the output end of the synthesis circuit αυ. I will do it. Therefore, if the output signal of the synthesis circuit (11) is adjusted by the volume and applied to the subtraction circuit (6), the output terminal of the subtraction circuit (6) receives a stereo composite signal from which the stereo pilot signal has been removed. can get.

As mentioned above, the level of the harmonic components contained in the first signal becomes smaller as the order becomes higher. Therefore, at least the third harmonic component (57KHz
) can be canceled, the pilot signal cancellation circuit shown in FIG. 2 will be effective. As a matter of course,
The effect becomes higher as the number of harmonic components to be canceled increases. In the embodiment, the subtraction circuit (6) is used to eliminate the stereo pilot signal from the stereo composite signal, but the synthesis circuit (I
]) It is also possible to use an adder circuit, taking into account the polarity of the output signal.

FIG. 3 shows an example of a level modulation circuit, in which a DC signal corresponding to the stereo pilot signal level is input to the first input terminal Q2, and a level modulated signal (the first signal and its harmonics) is input to the second input terminal Q31. signal) respectively, and the transistor side is switched by the level modulated signal,
This is to generate a modulated output at the output terminal α9. Moreover, FIG. 4 shows another example of the level modulation circuit, and the first
A DC signal corresponding to the stereo pilot signal level is applied to the input terminal (16), a level modulated signal is applied to the second input terminal (171), and the differentially connected first and second transistors 0 barrel and α wing are connected. Level modulation is performed using the input transistor (A) connected to the common emitter. Figure 5 shows an example of a level ratio setting circuit, in which the amplifier section (211) and the negative It consists of a resistor (27J) and a variable resistor (c) that constitute a return path to the input terminal.The output signal of the level modulation circuit applied to the input terminal (24J) has a gain determined by the adjustment of the variable resistor (231). 0 that is amplified and generated at the output terminal. Therefore, by adjusting the value of the variable resistor (c) and applying it to the 14M signal and its harmonics, the output has a level ratio that has a predetermined relationship with each other. I can get the signal.

(F) Effects of the Invention As described above, the present invention has the advantage of providing a pilot signal cancellation circuit that can reliably cancel the stereo pilot signal included in the stereo composite signal. Further, according to the present invention, since there is no need for a waveform shaping circuit consisting of a coil and a capacitor that cannot be integrated into an IC, it is easy to integrate the circuit into an IC, and there is an advantage that no change in characteristics occurs.

[Brief explanation of the drawing]

Fig. 1 is a circuit diagram showing a conventional pilot signal cancellation circuit, Fig. 2 is a circuit diagram showing an embodiment of the present invention, Fig. 3 is a circuit diagram showing an example of the level modulation circuit, and Fig. 4 is a circuit diagram showing an example of the level modulation circuit. FIG. 5 is a circuit diagram showing another example thereof, and FIG. 5 is a circuit diagram showing an example of the level ratio setting circuit of FIG. 2. Explanation of main drawing numbers (3)...Level detection circuit, (6)...Subtraction circuit, (8)...PLL circuit, (9+) (9t) (9n
) +... Level modulation circuit, (IJ) (102) (10
n) - Level ratio setting circuit, aυ... synthesis circuit. i1@13″ Figure 4 Figure 5

Claims (1)

[Claims] (IJ A circuit for erasing a stereo pilot signal included in a stereo composite signal, which includes a PLL circuit that generates a first signal synchronized with the stereo pilot signal and a harmonic signal of the first signal, and a level detection circuit that detects the level of the pilot signal;
a plurality of level modulation circuits that level modulate the first signal and a harmonic signal of the first signal using the output signal of the level detection circuit to generate a signal according to the level of the stereo pilot signal; , a level ratio setting circuit that sets the levels of the output signals of the plurality of level modulation circuits in a predetermined relationship with each other, a synthesis circuit that synthesizes the output signals of the level ratio setting circuit, and an output signal of the synthesis circuit and the 1. A pilot signal cancellation circuit comprising an arithmetic circuit that adds or subtracts a stereo composite signal, and is configured to obtain a stereo composite signal from which a stereo pilot signal has been removed at an output terminal of the arithmetic circuit.