JPS61260666A - バイポ−ラ集積回路およびその製造方法 - Google Patents

バイポ−ラ集積回路およびその製造方法

Info

Publication number
JPS61260666A
JPS61260666A JP61105016A JP10501686A JPS61260666A JP S61260666 A JPS61260666 A JP S61260666A JP 61105016 A JP61105016 A JP 61105016A JP 10501686 A JP10501686 A JP 10501686A JP S61260666 A JPS61260666 A JP S61260666A
Authority
JP
Japan
Prior art keywords
region
epitaxial layer
conductivity type
transistor
forming
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP61105016A
Other languages
English (en)
Japanese (ja)
Inventor
ウバルド・マストロマティオ
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SRL
Original Assignee
SGS Microelettronica SpA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SGS Microelettronica SpA filed Critical SGS Microelettronica SpA
Publication of JPS61260666A publication Critical patent/JPS61260666A/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
    • H10D84/67—Complementary BJTs
    • H10D84/673—Vertical complementary BJTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0112—Integrating together multiple components covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating multiple BJTs
    • H10D84/0119—Integrating together multiple components covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating multiple BJTs the components including complementary BJTs
    • H10D84/0121—Integrating together multiple components covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating multiple BJTs the components including complementary BJTs the complementary BJTs being vertical BJTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/031—Manufacture or treatment of isolation regions comprising PN junctions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/30—Isolation regions comprising PN junctions

Landscapes

  • Bipolar Integrated Circuits (AREA)
  • Bipolar Transistors (AREA)
  • Element Separation (AREA)
JP61105016A 1985-05-09 1986-05-09 バイポ−ラ集積回路およびその製造方法 Pending JPS61260666A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
IT20640/85A IT1218471B (it) 1985-05-09 1985-05-09 Circuito integrato bipolare comprendente transistori pnp verticali con collettore sul substrato
IT20640A/85 1985-05-09

Publications (1)

Publication Number Publication Date
JPS61260666A true JPS61260666A (ja) 1986-11-18

Family

ID=11169918

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61105016A Pending JPS61260666A (ja) 1985-05-09 1986-05-09 バイポ−ラ集積回路およびその製造方法

Country Status (6)

Country Link
JP (1) JPS61260666A (it)
FR (1) FR2581796B1 (it)
GB (1) GB2175138B (it)
IT (1) IT1218471B (it)
NL (1) NL8601107A (it)
SE (1) SE8602088L (it)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4951115A (en) * 1989-03-06 1990-08-21 International Business Machines Corp. Complementary transistor structure and method for manufacture
JP2835116B2 (ja) * 1989-09-29 1998-12-14 株式会社東芝 電力用ｉｃおよびその製造方法
EP0915508A1 (en) * 1997-10-10 1999-05-12 STMicroelectronics S.r.l. Integrated circuit with highly efficient junction insulation
DE19805786A1 (de) * 1998-02-12 1999-08-26 Siemens Ag Halbleiterbauelement mit Struktur zur Vermeidung von Querströmen
GB2367187B (en) * 2000-09-21 2002-11-13 Bookham Technology Plc An isolation device

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3648128A (en) * 1968-05-25 1972-03-07 Sony Corp An integrated complementary transistor circuit chip with polycrystalline contact to buried collector regions
JPS5942463B2 (ja) * 1972-09-22 1984-10-15 ソニー株式会社 半導体集積回路装置
JPS5914897B2 (ja) * 1975-02-08 1984-04-06 ソニー株式会社 半導体装置
JPS5710964A (en) * 1980-06-25 1982-01-20 Fujitsu Ltd Manufacture of semiconductor device
US4609413A (en) * 1983-11-18 1986-09-02 Motorola, Inc. Method for manufacturing and epitaxially isolated semiconductor utilizing etch and refill technique

Also Published As

Publication number Publication date
IT1218471B (it) 1990-04-19
SE8602088D0 (sv) 1986-05-07
FR2581796A1 (fr) 1986-11-14
FR2581796B1 (fr) 1989-05-19
IT8520640A0 (it) 1985-05-09
GB2175138B (en) 1989-04-19
GB2175138A (en) 1986-11-19
GB8611203D0 (en) 1986-06-18
SE8602088L (sv) 1986-11-10
NL8601107A (nl) 1986-12-01

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