JPS61294530A - Control system for application of power supply - Google Patents

Abstract

PURPOSE:To prevent the superposition of rush currents by monitoring the rush current, etc. to a device receiving the supply of power to actuate a counting means after a fixed delay time when the rush current higher than a prescribed level is detected and deciding the device receiving the supply of power to which a power supply should be applied. CONSTITUTION:The power is supplied to the I/O devices 4 (4-0-4-n) serving as the devices receiving the supply of power from a DC power supply through a power supply control circuit 1. The circuit 1 consists of a power supply sequence control circuit 2, the power supply application relay drive circuits 3 (3-1-3-n) and their relay contacts rl1-rln. When the power supply is applied, the rush current and the feedback current to and from the I/O device 4 are monitored. If a peak-to-peak current higher than a prescribed level is detected, a counting means of the circuit 2 is actuated after a fixed delay time. Then the I/O device 4 to receive the application of a power supply is decided based on the count output of the circuit 2. In such a way, it is possible to prevent the superposition of rush currents and to avoid the redundant design of a power supply device.

Description

[Detailed Description of the Invention] [Summary] Monitors the inrush power to the power supply device or the return power from the power supply device, and when a peak-to-peak current exceeding a predetermined value is detected, a certain delay time is detected. After that, the counting means is operated, and based on the output of the counting means, the power-on switch means corresponding to the power-supplied device to be powered on next is operated, thereby sequentially turning on the power to each device. It is shown.

[Industrial application field]

The present invention relates to a power-on control method when a plurality of I10 devices, such as bird disk devices, which have a large inrush current and a long duration time when the power is turned on, are connected to an information processing device and the power is turned on.

[Problems to be Solved by the Prior Art and the Invention] Conventionally, there have been two problems with regard to power-on of information processing devices, particularly the above-mentioned I10 device.

The first is that the overcurrent detection/protection circuit inside the power supply device malfunctions due to the inrush current when the power is turned on.To prevent this problem, overcurrent detection is strictly prohibited while the inrush current is flowing. Alternatively, it is necessary to perform processing such as suppressing the inrush current as much as possible and setting the overcurrent detection level higher than the inrush current value.

The second problem is that when multiple devices such as hard disk drives have large inrush current values (about 5 times the rated value on average) and long durations (about 15 seconds), the power consumption increases due to the superimposition of inrush currents. It is necessary to design the power supply to withstand the power consumption, and it is necessary to design it with a rated value higher than the power consumption during normal operation, or to provide a special power-on sequence in the power supply (because it is also used by other devices). This is a factor in increasing costs.

[Means for solving problems]

In order to solve the above points, the present invention provides current detection means for detecting a peak-to-peak current of a predetermined value or more with respect to inrush current or feedback current flowing from a power supplied device to a power supply; a delay means for delaying an output signal; a counting means for performing a counting operation according to an output signal of the delay means; a decoding means for decoding the output of the counting means; a launch means for holding the output of the decoding means; switch means for controlling power supply to the corresponding power-supplied device by the output of the latch means, and a switch means for controlling power-on to the corresponding power supplied device according to the output of the latch means;
Each time a two-peak current is detected, the counting means performs a counting operation, and the latch means and switch means corresponding to the output of the counting means are operated, thereby turning on power to a plurality of power-supplied devices. It is characterized by being executed sequentially.

[Effect]

In the present invention, the inrush current to the power supplied device or the feedback current from the power supplied device is monitored, and when a peak-to-peak current exceeding a predetermined value is detected, after a certain delay time, a count is performed. The device is configured to operate the counting device, determine a power supplied device to be powered on based on the output of the counting device, and power on the device. In this manner, by providing a certain delay time, it is possible to prevent the superimposition of inrush currents, and it is possible to avoid redundant design of the power supply device.

Further, in the present invention, the same circuit (rush current detection circuit) is configured to operate as an overcurrent detection circuit after inrush current is detected when power is supplied to the last power-supplied device.

This eliminates the conflict between inrush current and overcurrent detection circuits, and provides an inexpensive sequential power-on method.

〔Example〕

FIG. 1 is a diagram showing the configuration of a power supply control circuit according to an embodiment of the present invention, in which 1 is a power supply control circuit, 2 is a power supply sequence control circuit, and 3-1 to 3-n.

3-b is a power-on relay drive circuit, 4-0 to 4-n- are I10 devices, Tr+-Trn, Trb are relay drive transistors, RLI to RLn, RLB are relays, rl+
~rln and rib are relay contacts.

FIG. 2 is an internal configuration diagram of the power supply sequence control circuit 2 shown in FIG. , 15 is a D type flip-flop, 16.17.18-1 to 18-n are latches, Tr is a transistor, and G1 is a gate circuit.

FIG. 1 shows a relay circuit for supplying DC output to each I10 device, and FIG. 2 shows a current detection circuit and the circuits controlled by the pulses taken from this circuit. ing.

The operation of the embodiment will be explained below.

When the power is turned on, the I10 device DC power supply shown in Figure 1 is connected.
10. DC power for driving the device is applied.

At this time, the rib relay is in the make state, so I
10 A drive voltage is applied to device 0, which causes an inrush current to flow as illustrated in FIG. This inrush current is returned to the ground of the power supply device from the I10 device via ① ② in Fig. 1. In the present invention, when an inrush current flows between
At 0, only the rp-p values illustrated in FIG. 3 are detected,
The transistor Tr is in the ON state only during this time.

The pulse waveform obtained by this transistor Tr is applied to the input of the monostable multi-by-break 11. When an input is applied to the output terminal of the monostable multi-bi break 11, in response to this input, the output terminal sends out the waveform shown in the diagram (note 1).

(Reverse waveform is also acceptable) - Next, monostable multivibrator 1
The output of 1 is connected to the clock input of the counter 13, and when the output of the monostable multi-by break 11 rises,
The output of the counter 13 is counted up by +1. The output of the counter 13 is an input to the decoder 14, which is designed to make one decoder output active depending on the state of the counter 13. The setting is to match the number of I10 devices and the number of input devices. For example, if 8 devices are input, it will be set to "1000" as shown in Figure 4, and this will be set to "1000" by the RESET signal when the power is turned on.
3 is loaded. The following explanation will be made on the assumption that 8 units are input.The counter 13 is incremented by 1 and becomes "1001" by the input current from the I10 device 0. As a result, the decoder 14
The “1” output of the latch becomes active and the latch 18-1 becomes 0.
1 output is latched as “H”. C1 turns on Tr+ shown in FIG. 1 and energizes relay RLI. As a result, relay contact rll becomes in the closed state.I
10 Apply a driving DC output voltage to the device 1. 1 becomes active in the I10 device to which a DC output voltage is applied, and as a result, a second input current flows across the current detection circuits jt and l, causing the decoder 14 to output "2" in the same manner as described above. is activated, and the relay connected to the "2" output of the decoder 14 is energized.

This operation is repeated in sequence until all I10 devices are turned on.

Note that the delay time of the monostable multi-bi break 11 is determined by the maximum value of the inrush current duration time of the connected I10 device. Further, the setting values and the connection order of I10 devices 1 to n are as shown in FIG.

When the last I10 device is turned on in the above-mentioned input sequence, the output of the decoder 14 is "7" which is active, and this is connected to the input of the DFF 15. This D
FF15 is a circuit for switching the current detection circuit 10 to an overcurrent circuit, and when the inrush current of the I10 device n is detected with the decoder output "7" active, the latch e connected to 0FF15 becomes active, and from then on The current detection circuit operates as an overcurrent detection circuit.

From now on, no inrush current should flow through the I10 devices Q -, -n, and in this state the current detection circuit 10
If a current is detected, it is treated as an overcurrent, and a condition of "0" is established between the ON pulse from the transistor Tr and the input signal from the latch O to the gate circuit G1.

As a result, the latch O becomes active, turning on the transistor Trb shown in FIG. 1, energizing the relay RLB, and breaking the relay contact rib. As a result, the driving DC power supply to the I10 device O-n is cut off.

By installing this circuit in a hard disk controller or the like instead of a power supply device, it becomes possible to add this function only when a hard disk is required, without providing redundancy to the power supply.

〔Effect of the invention〕

According to the present invention, sequential power-on can be realized with a simple configuration, and inrush current at power-on and overcurrent at normal times can be treated separately, and hardware can be simplified.

[Brief explanation of the drawing]

Fig. 1 is a diagram showing the configuration of a power supply control circuit according to an embodiment of the present invention, Fig. 2 is an internal configuration diagram of a power supply sequence control circuit, Fig. 3 is a diagram showing inrush power supply waveforms, and Fig. 4 is a diagram showing setting values and FIG. 3 is a diagram showing the relationship in the connection order of I10 devices. In Fig. 1, 10 is a current detection circuit, 11 is a monostable multi-pipe rake, 13 is a counter, 14 is a decoder, 16, 17.18 AC/incoming current waveform and fan, -f
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Claims (2)

[Claims] (1) current detection means for detecting a peak-to-peak current equal to or higher than a predetermined value with respect to the input current or the feedback current flowing from the power supplied device to the power supply; and a delay means for delaying the output signal from the current detection means; A counting means that performs a counting operation in response to an output signal of the delay means, a decoding means that decodes the output of the counting means, a latch means that holds the output of the decoding means, and a corresponding power supply according to the output of the latch means. It is equipped with a switch means for controlling power supply to the supply device, and is equipped with a switch means to control the power supply to the supply device, and prevents the peak current or inrush current from exceeding a predetermined value.
Each time a two-peak current is detected, the counting means performs a counting operation, and the latch means and switch means corresponding to the output of the counting means are operated, thereby turning on power to a plurality of power-supplied devices. A power-on control method characterized by sequential execution. (2) A power-on completion detection means is provided to detect that power-on to all power-supplied devices has been completed, and after the power-on completion, the output of the power-on completion detection means is used to output the output of the current detection means. A power-on control method according to claim 1, wherein the power-on control method is inputted to the overcurrent detection and holding means.