JPH0321929B2 - - Google Patents

Description

[Detailed Description of the Invention] [Summary] Monitors the inrush power to the power supply device or the return current from the power supply device, and when a peak-to-peak current of a predetermined value or higher is detected, a certain delay is detected. After the time has elapsed, the counting means is operated, and based on the output of the counting means, the power supply switch means corresponding to the next power-supplied device to be powered on is operated, and each device is sequentially powered on. After the power-on is completed, a configuration is shown in which the output of the power supply detection means is inputted to the overcurrent detection and holding means based on the output of the power-on completion detection means.

[Industrial application field]

The present invention relates to a power-on control method when a plurality of I/O devices, such as a bird disk device, which have a large inrush current and a long duration when the power is turned on are connected to an information processing device and the power is turned on. .

[Problems to be solved by conventional technology and invention]

Conventionally, two problems have existed regarding powering on information processing devices, particularly the above-mentioned I/O devices.

The first is that the overcurrent detection/protection circuit in the power supply device malfunctions due to the inrush current when the power is turned on.To prevent this problem, overcurrent detection must be prohibited while the inrush current is flowing, or It was necessary to suppress the inrush current as much as possible and to set the overcurrent detection level higher than the inrush current value.

The second problem is that when using multiple devices such as hard disk drives, which have a large inrush current value (about 5 times the rated value on average) and a long duration (about 15 times), the power consumption due to the superimposed inrush current can withstand. It is necessary to design the power supply in order to obtain the power consumption, and it is necessary to design the power supply with a rated value higher than the power consumption during normal operation, or to provide a special power-on sequence in the power supply (because it is also used in other devices). This is a factor in increasing costs.

[Means for solving problems]

In order to solve the above points, the present invention provides current detection means for detecting a peak-to-peak current of a predetermined value or more with respect to inrush current or feedback current flowing from a power supplied device to a power supply; A delay means for delaying an output signal, a counting means for performing a counting operation according to an output signal of the delay means, a decoding means for decoding the output of the counting means, and a latch means for holding the output of the decoding means. , switch means for controlling power supply to the corresponding power supplied device by the output of the latch means;
A power-on completion detection means is provided to detect that power-on has been completed to all power-supplied devices, and the above-mentioned count is performed each time a peak-to-peak current of a feedback current or inrush current that is equal to or higher than a predetermined value is detected. By causing the counting means to perform a counting operation and operating the latch means and switch means corresponding to the output of the counting means, power is sequentially turned on to a plurality of power supplied devices, and after the power is turned on,
The present invention is characterized in that the output of the current detection means is input to the overcurrent detection and holding means based on the output of the power-on completion detection means.

[Effect]

In the present invention, the inrush current to the power supplied device or the feedback current from the power supplied device is monitored, and when a peak-to-peak current exceeding a predetermined value is detected, after a certain delay time, the counting means is operated, the device to be powered is determined to be powered on based on the output of the counting means, and the power is turned on to the device. In this manner, by providing a certain delay time, it is possible to prevent the superimposition of inrush currents, and it is possible to avoid redundant design of the power supply device.

Further, in the present invention, the same circuit (rush current detection circuit) is configured to operate as an overcurrent detection circuit after inrush current is detected when power is supplied to the last power-supplied device.

This eliminates the conflict between the inrush current and overcurrent detection circuits, and provides an inexpensive sequential power-on method.

〔Example〕

FIG. 1 is a diagram showing the configuration of a power supply control circuit according to an embodiment of the present invention, in which 1 is a power supply control circuit, 2 is a power supply sequence control circuit, and 3-1 to 3
n, 3-b is a power-on relay drive circuit, 4-0~
4-n I/O device, Tr ₁ ~ Trn, Trb are relay drive transistors, RL1 ~ RLn, RLB are relays, r1 ₁
~r1n and r1b are relay contacts.

FIG. 2 is an internal configuration diagram of the power supply sequence control circuit 2 shown in FIG. 15 is a D type flip-flop, 16, 17, 18-
1 to 18-n are latches, Tr is a transistor, GI
is a gate circuit.

Figure 1 shows a relay circuit for supplying DC output to each I/O device, and Figure 2 shows a current detection circuit and each circuit controlled by the pulses taken out from this circuit. Illustrated.

The operation of the embodiment will be explained below.

When the power is turned on, the I/O device DC shown in Figure 1
A DC power source for driving an I/O device is applied to the power source.
At this time, since the r1b relay is in the make state, a driving voltage is applied to the I/O device O, and as a result, an inrush current as shown in FIG. 3 flows. This rush current is returned from the I/O device to the ground of the power supply device via the circuit shown in FIG. In the present invention, when an inrush current flows between the two, the current detection circuit 10 shown in FIG. 2 detects only the Ip-p value shown in FIG. 3, and the transistor Tr is in the ON state for only this time. . this transistor
The pulse waveform obtained by the Tr is applied to the input of the monostable multivibrator 11. When an input is applied to the output terminal of the monostable multivibrator 11, in response to this input, the output terminal sends out the waveform shown in the diagram (note 1). (An inverse waveform is also acceptable.) Next, the output of the monostable multivibrator 11 is connected to the clock input of the counter 13, and when the output of the monostable multivibrator 11 rises, the output of the counter 13 is counted up by +1. The output of the counter 13 is the input of the decoder 14, and the output of the counter 13 is
It is designed to make one decoder output active depending on the state of the decoder. Also, the setting is to match the number of I/O devices and the number of input devices. For example, if 8 devices are input, it will be set to "1000" as shown in Figure 4, and this will be set at RESET when the power is turned on.
The counter 13 is loaded by the signal. below,
The explanation will be based on the assumption that 8 devices are input.The counter 13 is incremented by 1 and becomes "1001" due to the input current from the I/O device 0. As a result, the decoder 14 becomes “1”.
The output becomes active and C1 of latch 18-1
The output is set to "H" and latched. C1 turns on Tr ₁ shown in FIG. 1 and energizes relay RL1. As a result, the relay contact r11 becomes a make state and applies a driving DC output voltage to the I/O device 1. The I/O device 1 to which the DC output voltage is applied enters the operating state, and as a result, a second input current flows across the current detection circuit 10, and the "2" output of the decoder 14 is activated in the same manner as described above. , energizes the relay connected to the “2” output of the decoder 14. This operation is repeated in sequence until all I/O devices are turned on.

Note that the delay time of the monostable multivibrator 11 is determined by the maximum value of the inrush current duration time of the connected I/O device. Further, the setting values and the connection order of I/O devices 1 to n are as shown in FIG.

When the last I/O device is turned on in the above-mentioned input sequence, the output of the decoder 14 is "7", which is active, and this is connected to the input of the DFF 15. This DFF 15 is a circuit for switching the current detection circuit 10 to an overcurrent circuit,
I/O when decoder output “7” is active
When an inrush current of the device n is detected, the latch e connected to the DFF 15 becomes active, and the current detection circuit thereafter operates as an overcurrent detection circuit.

From now on, no inrush current should flow through the I/O devices 0 to n, and if the current detection circuit 10 detects a P-P current in this state, it will be treated as an overcurrent and will be activated by the ON pulse from the transistor Tr and the latch. The condition that both inputs are "0" is established between the input signals from and to the gate circuit G1. As a result, the latch becomes active, turning on the transistor Trb shown in FIG. 1, energizing the relay RLB, and breaking the relay contact r1b. This allows I/
The DC power supplies for driving the O devices 0 to n are cut off.

By mounting this circuit on a hard disk controller or the like instead of a power supply device, it becomes possible to add this function only when a hard disk is needed without providing redundancy to the power supply.

〔Effect of the invention〕

According to the present invention, it is possible to implement sequential power-on with a simple configuration, and it is also possible to handle inrush current at power-on and overcurrent during normal operation separately, thereby achieving hardware simplification.

[Brief explanation of drawings]

Fig. 1 is a diagram showing the configuration of a power supply control circuit according to one embodiment of the present invention, Fig. 2 is an internal configuration diagram of a power supply sequence control circuit, Fig. 3 is a diagram showing inrush power supply waveforms, and Fig. 4 is a set value. FIG. 2 is a diagram showing the relationship between the connection order of the I/O devices and the connection order of the I/O devices. In Figure 2, 10 is a current detection circuit, 11 is a monostable multivibrator, 1
3 is a counter, 14 is a decoder, 16, 17, 1
8-1 to 18-n are latches.

Claims (1)

[Scope of Claims] 1. Current detection means for detecting a peak-to-peak current of a predetermined value or more with respect to a feedback current flowing from an applied power source or a power-supplied device to a power source; and a delay in the output signal from the current detection means. a delay means; a counting means for performing a counting operation according to an output signal of the delay means; a decoding means for decoding the output of the counting means; a latch means for holding the output of the decoding means; It is equipped with a switch means for controlling power-on to the corresponding power-supplied devices by an output, and a power-on completion detection means for detecting that power-on to all the power-supplied devices has been completed, and a feedback current or Each time a peak-to-peak current equal to or higher than a predetermined value is detected regarding the inrush current, the counting means performs a count operation, and the latch means and switch means corresponding to the output of the counting means are operated. Turn on the power to the power supplied devices in sequence, and after turning on the power,
A power supply control system characterized in that the output of the current detection means is input to overcurrent detection and holding means based on the output of the power-on completion detection means.