JPS6157535U - - Google Patents

Info

Publication number
JPS6157535U
JPS6157535U JP1984142969U JP14296984U JPS6157535U JP S6157535 U JPS6157535 U JP S6157535U JP 1984142969 U JP1984142969 U JP 1984142969U JP 14296984 U JP14296984 U JP 14296984U JP S6157535 U JPS6157535 U JP S6157535U
Authority
JP
Japan
Prior art keywords
flip
semiconductor device
electrical connection
utility
scope
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1984142969U
Other languages
English (en)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1984142969U priority Critical patent/JPS6157535U/ja
Publication of JPS6157535U publication Critical patent/JPS6157535U/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/877—Bump connectors and die-attach connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/761—Package configurations characterised by the relative positions of pads or connectors relative to package parts of strap connectors
    • H10W90/764—Package configurations characterised by the relative positions of pads or connectors relative to package parts of strap connectors between a chip and a stacked insulating package substrate, interposer or RDL

Description

【図面の簡単な説明】
第１図ａ，ｂは従来構造を示す平面図、側面図
、第２図は従来装置の実装構造図、第３図ａ，ｂ
は本考案の一実施構造を示す平面図及び側面図、
第４図、第５図は本考案の実装構造図である。 図において１はシリコンチツプ、２はバンプ、
３は基板、４は放熱用金属部、５は接続子、６は
導体パターン、７はヒートシンクである。

Claims (1)

    【実用新案登録請求の範囲】
  1. 表面に電気接続用バンプが設けられたフリツプ
    チツプ型半導体装置において、前記表面と反対面
    に放熱用金属部を設けたことを特徴とするフリツ
    プチツプ型半導体装置。
JP1984142969U 1984-09-21 1984-09-21 Pending JPS6157535U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1984142969U JPS6157535U (ja) 1984-09-21 1984-09-21

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1984142969U JPS6157535U (ja) 1984-09-21 1984-09-21

Publications (1)

Publication Number Publication Date
JPS6157535U true JPS6157535U (ja) 1986-04-17

Family

ID=30701282

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1984142969U Pending JPS6157535U (ja) 1984-09-21 1984-09-21

Country Status (1)

Country Link
JP (1) JPS6157535U (ja)

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