JPS6181273U - - Google Patents
Info
- Publication number
- JPS6181273U JPS6181273U JP16502684U JP16502684U JPS6181273U JP S6181273 U JPS6181273 U JP S6181273U JP 16502684 U JP16502684 U JP 16502684U JP 16502684 U JP16502684 U JP 16502684U JP S6181273 U JPS6181273 U JP S6181273U
- Authority
- JP
- Japan
- Prior art keywords
- transistors
- power supply
- recording
- transistor
- emitters
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000010355 oscillation Effects 0.000 claims 2
- 239000003990 capacitor Substances 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 4
Landscapes
- Television Signal Processing For Recording (AREA)
Description
第1図は本考案のFM変復調回路の回路図、第
2図及び第3図は各々第1図の変調特性及びFM
復調特性を示す説明特性図、第4図は従来のFM
変復調回路図、第5図及び第6図は各々第4図の
変調特性及びFM復調特性を示す説明特性図であ
る。
主な図番の説明、1…マルチバイブレータ、2
…第1のトランジスタ、3…第2のトランジスタ
、4…第3のトランジスタ、5…第4のトランジ
スタ、6…第5のトランジスタ、7…第6のトラ
ンジスタ、8…第7のトランジスタ、9…第8の
トランジスタ、10…第9のトランジスタ、11
,14,15,32…記録再生切換スイツチ、1
2…定電流隙、16,17…レベルシフタ、18
…掛算器、19…リミツタ、21,22…入力端
子、23,24…出力端子、25…ローパスフイ
ルタ、30…第1の直流電源、31…第2の直流
電源。
Fig. 1 is a circuit diagram of the FM modulation/demodulation circuit of the present invention, and Figs. 2 and 3 show the modulation characteristics and FM characteristics of Fig. 1, respectively.
An explanatory characteristic diagram showing demodulation characteristics, Fig. 4 is a conventional FM
The modulation and demodulation circuit diagrams, FIGS. 5 and 6, are explanatory characteristic diagrams showing the modulation characteristics and FM demodulation characteristics of FIG. 4, respectively. Explanation of main figure numbers, 1... Multivibrator, 2
...first transistor, 3...second transistor, 4...third transistor, 5...fourth transistor, 6...fifth transistor, 7...sixth transistor, 8...seventh transistor, 9... Eighth transistor, 10...Ninth transistor, 11
, 14, 15, 32...recording/reproduction switching switch, 1
2... Constant current gap, 16, 17... Level shifter, 18
...Multiplier, 19...Limiter, 21, 22...Input terminal, 23, 24...Output terminal, 25...Low pass filter, 30...First DC power supply, 31...Second DC power supply.
Claims (1)
するFM変調回路において、エミツタが共通に接
続された第1のトランジスタと第2のトランジス
タ、該第1及び第2のトランジスタの各コレクタ
にエミツタが接続された第3及び第4のトランジ
スタ、該第3及び第4のトランジスタの各コレク
タにエミツタが接続された第5及び第6のトラン
ジスタ、前記第1及び第2のトランジスタのエミ
ツタとアース間に接続した第1の記録・再生切換
スイツチ、前記第1及び第2のトランジスタの各
ベースに接続した第2の記録・再生切換スイツチ
、前記第1の記録・再生切換スイツチの記録端子
とアース間にコレクタ・エミツタ路を接続した記
録信号用トランジスタ及び前記第3及び第4のト
ランジスタのエミツタ間に接続した発振用コンデ
ンサより成り、前記第5及び第6のトランジスタ
のベースに第1の直流電源及び第2の直流電源を
切換手段を介して接続し、記録時前記記録信号用
トランジスタのベースに加える記録輝度信号に応
じて前記第1の直流電源にて動作する前記第5及
び第6のトランジスタの出力側より発振出力を導
出し、再生時掛算器に再生FM信号及び前記第2
の直流電源にて動作する第5及び第6のトランジ
スタの出力信号を入力し、該掛算器の出力をロー
パスフイルタを介して復調出力を導出し、前記第
1の直流電源の電圧を第2の直流電源の電圧より
も大になし、再生時の完度を上げることを特徴と
したFM変復調回路。 In an FM modulation circuit that performs FM modulation of a luminance signal during recording and FM demodulation during playback, a first transistor and a second transistor whose emitters are connected in common, and an emitter at each collector of the first and second transistors are provided. third and fourth transistors connected to each other; fifth and sixth transistors having emitters connected to respective collectors of the third and fourth transistors; and between the emitters of the first and second transistors and ground. between the connected first recording/playback switch, the second record/playback switch connected to the bases of the first and second transistors, and the recording terminal of the first record/playback switch and ground. It consists of a recording signal transistor with a collector-emitter path connected and an oscillation capacitor connected between the emitters of the third and fourth transistors. The outputs of the fifth and sixth transistors are connected to a second DC power supply via a switching means, and are operated by the first DC power supply in response to a recording luminance signal applied to the base of the recording signal transistor during recording. The oscillation output is derived from the side, and the reproduced FM signal and the second
The output signals of the fifth and sixth transistors operating on the DC power supply are input, the output of the multiplier is passed through a low-pass filter to derive the demodulated output, and the voltage of the first DC power supply is inputted to the second DC power supply. This is an FM modulation/demodulation circuit that has a voltage higher than that of the DC power supply and is characterized by improving the quality of playback.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16502684U JPH04627Y2 (en) | 1984-10-31 | 1984-10-31 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16502684U JPH04627Y2 (en) | 1984-10-31 | 1984-10-31 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6181273U true JPS6181273U (en) | 1986-05-29 |
| JPH04627Y2 JPH04627Y2 (en) | 1992-01-09 |
Family
ID=30722888
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16502684U Expired JPH04627Y2 (en) | 1984-10-31 | 1984-10-31 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH04627Y2 (en) |
-
1984
- 1984-10-31 JP JP16502684U patent/JPH04627Y2/ja not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPH04627Y2 (en) | 1992-01-09 |
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