JPS6186941U - - Google Patents

Info

Publication number
JPS6186941U
JPS6186941U JP1984172868U JP17286884U JPS6186941U JP S6186941 U JPS6186941 U JP S6186941U JP 1984172868 U JP1984172868 U JP 1984172868U JP 17286884 U JP17286884 U JP 17286884U JP S6186941 U JPS6186941 U JP S6186941U
Authority
JP
Japan
Prior art keywords
integrated circuit
scale integrated
substrate
metal plate
mounting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1984172868U
Other languages
English (en)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1984172868U priority Critical patent/JPS6186941U/ja
Publication of JPS6186941U publication Critical patent/JPS6186941U/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/531—Shapes of wire connectors
    • H10W72/5363—Shapes of wire connectors the connected ends being wedge-shaped
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/884—Die-attach connectors and bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Cooling Or The Like Of Electrical Apparatus (AREA)
  • Die Bonding (AREA)

Description

【図面の簡単な説明】
第１図は本考案の一実施例の大規模集積回路の
基板への実装構造の上面図、第２図ａおよびｂは
一実施例の実装構造の側断面図、第３図は一実施
例の金属板の上面図、第４図ａ，ｂは従来の大規
模集積回路の基板への実装構造を示す一例断面図
、第５図ａ，ｂは発熱量の大きい大規模集積回路
の基板への実装構造の側断面図である。 図において、１は基板、２は大規模集積回路（
ＬＳＩ）、３は接着剤、４はワイヤボンド、５は
テイプオートメイテツドボンデイング、６は電気
回路、７は貫通孔、８はメタルコア、９は金属板
、１０は金属板の穴をそれぞれ示している。

Claims (1)

    【実用新案登録請求の範囲】
  1. 電気回路を形成する基板上に大規模集積回路を
    固定し、前記電気回路に前記大規模集積回路の出
    力端を接続する大規模集積回路の基板への実装構
    造において、前記両回路の接続個所に対応した位
    置に穴を有する金属板を備えるとともに、前記金
    属板を前記基板と、前記大規模集積回路との間に
    挟着して付設したことを特徴とする大規模集積回
    路の基板への実装構造。
JP1984172868U 1984-11-13 1984-11-13 Pending JPS6186941U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1984172868U JPS6186941U (ja) 1984-11-13 1984-11-13

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1984172868U JPS6186941U (ja) 1984-11-13 1984-11-13

Publications (1)

Publication Number Publication Date
JPS6186941U true JPS6186941U (ja) 1986-06-07

Family

ID=30730527

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1984172868U Pending JPS6186941U (ja) 1984-11-13 1984-11-13

Country Status (1)

Country Link
JP (1) JPS6186941U (ja)

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