JPS6351437U - - Google Patents
Info
- Publication number
- JPS6351437U JPS6351437U JP14451986U JP14451986U JPS6351437U JP S6351437 U JPS6351437 U JP S6351437U JP 14451986 U JP14451986 U JP 14451986U JP 14451986 U JP14451986 U JP 14451986U JP S6351437 U JPS6351437 U JP S6351437U
- Authority
- JP
- Japan
- Prior art keywords
- bonding device
- semiconductor chip
- frame
- wire bonding
- die bonding
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 9
- 238000004519 manufacturing process Methods 0.000 claims description 5
- 238000007789 sealing Methods 0.000 claims description 4
- 239000011347 resin Substances 0.000 claims description 3
- 229920005989 resin Polymers 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 3
- 238000009434 installation Methods 0.000 description 2
Landscapes
- Wire Bonding (AREA)
Description
第１図および第２図は本考案に係る半導体製造
装置の全体を示す簡略図と斜視図、第３図は同じ
く半導体製造装置の設置例を示す平面図、第４図
および第５図は従来の半導体製造装置を示す簡略
図と斜視図、第６図はその半導体製造装置の設置
例を示す図である。
１１……筐体、１２……フレーム・チツプ供給
口、１３……成形品排出口、１４……リードフレ
ーム、１５……半導体チツプ、１６……ダイボン
デイング装置、１７……ワイヤボンデイング装置
、１８……樹脂封止装置、１９……フレームロー
ド室。
1 and 2 are a simplified diagram and a perspective view showing the entire semiconductor manufacturing equipment according to the present invention, FIG. 3 is a plan view showing an example of the installation of the semiconductor manufacturing equipment, and FIGS. 4 and 5 are conventional FIG. 6 is a simplified diagram and a perspective view showing a semiconductor manufacturing apparatus, and FIG. 6 is a diagram showing an installation example of the semiconductor manufacturing apparatus. 11... Housing, 12... Frame/chip supply port, 13... Molded product discharge port, 14... Lead frame, 15... Semiconductor chip, 16... Die bonding device, 17... Wire bonding device, 18 ...Resin sealing device, 19...Frame load chamber.
Claims (1)
有する筐体内に、リードフレーム上に半導体チツ
プを接合するダイボンデイング装置と、このダイ
ボンデイング装置に並設されワイヤによつて半導
体チツプとリードとを接続するワイヤボンデイン
グ装置と、このワイヤボンデイング装置の近傍に
配設されリードフレーム上の半導体チツプを樹脂
封止する樹脂封止装置とを収納し、この樹脂封止
装置と前記ワイヤボンデイング装置との間にフレ
ームロード室を形成したことを特徴とする半導体
製造装置。 A die bonding device for bonding a semiconductor chip onto a lead frame is placed in a housing having a frame/chip supply port and a molded product discharge port, and a die bonding device is installed in parallel with the die bonding device to connect the semiconductor chip and the leads by wires. A wire bonding device and a resin sealing device disposed near the wire bonding device for resin-sealing a semiconductor chip on a lead frame are housed, and a frame is installed between the resin sealing device and the wire bonding device. A semiconductor manufacturing device characterized by forming a load chamber.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14451986U JPS6351437U (en) | 1986-09-20 | 1986-09-20 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14451986U JPS6351437U (en) | 1986-09-20 | 1986-09-20 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6351437U true JPS6351437U (en) | 1988-04-07 |
Family
ID=31055194
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14451986U Pending JPS6351437U (en) | 1986-09-20 | 1986-09-20 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6351437U (en) |
-
1986
- 1986-09-20 JP JP14451986U patent/JPS6351437U/ja active Pending