JPS6425469A - Manufacture of bipolar type semiconductor integrated circuit device - Google Patents

Manufacture of bipolar type semiconductor integrated circuit device

Info

Publication number
JPS6425469A
JPS6425469A JP62180999A JP18099987A JPS6425469A JP S6425469 A JPS6425469 A JP S6425469A JP 62180999 A JP62180999 A JP 62180999A JP 18099987 A JP18099987 A JP 18099987A JP S6425469 A JPS6425469 A JP S6425469A
Authority
JP
Japan
Prior art keywords
type
layer
oxide film
silicon
polycrystalline silicon
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62180999A
Other languages
Japanese (ja)
Inventor
Akira Kawakatsu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Priority to JP62180999A priority Critical patent/JPS6425469A/en
Publication of JPS6425469A publication Critical patent/JPS6425469A/en
Pending legal-status Critical Current

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Landscapes

  • Bipolar Transistors (AREA)

Abstract

PURPOSE:To obtain a bipolar type semiconductor integrated circuit device which can be operated at a high speed with low power consumption by forming a total base region including an inactive base in a region of a polycrystalline silicon. CONSTITUTION:An N<+> type buried diffused layer 12 an N<-> type epitaxial layer 13, an isolating oxide film 14, and an N<+> type collector region 15 are formed on a P<-> type silicon substrate 11. A CVD oxide film 18 by thermal oxidation, a polycrystalline silicon 17' and an oxide film 16 are selectively removed substantially perpendicularly to the substrate face, part of the layer 13 is exposed, a polycrystalline silicon 17'' is formed. The silicon 17'' is perpendicularly etched, the silicon 17'' remains only on the sidewalls of three layers 16, 17', 18, heat treated, and a P<+> type inactive base 19 is formed on the layer 13. A thin oxide film 20 is formed on the layer 13 by thermally oxidizing at a low temperature, and P-type active base 21 is formed thereunder. The film 20 is removed, a polycrystalline silicon 22 is formed, heat treated to form an N<+> type emitter 23.
JP62180999A 1987-07-22 1987-07-22 Manufacture of bipolar type semiconductor integrated circuit device Pending JPS6425469A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62180999A JPS6425469A (en) 1987-07-22 1987-07-22 Manufacture of bipolar type semiconductor integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62180999A JPS6425469A (en) 1987-07-22 1987-07-22 Manufacture of bipolar type semiconductor integrated circuit device

Publications (1)

Publication Number Publication Date
JPS6425469A true JPS6425469A (en) 1989-01-27

Family

ID=16092963

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62180999A Pending JPS6425469A (en) 1987-07-22 1987-07-22 Manufacture of bipolar type semiconductor integrated circuit device

Country Status (1)

Country Link
JP (1) JPS6425469A (en)

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