JPS6430448U - - Google Patents
Info
- Publication number
- JPS6430448U JPS6430448U JP12452587U JP12452587U JPS6430448U JP S6430448 U JPS6430448 U JP S6430448U JP 12452587 U JP12452587 U JP 12452587U JP 12452587 U JP12452587 U JP 12452587U JP S6430448 U JPS6430448 U JP S6430448U
- Authority
- JP
- Japan
- Prior art keywords
- signal
- trigger
- trigger signal
- input
- arithmetic unit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 claims 2
- 238000005070 sampling Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 4
- 238000004364 calculation method Methods 0.000 description 1
Landscapes
- Tests Of Electronic Circuits (AREA)
- Measuring Frequencies, Analyzing Spectra (AREA)
Description
第１図は本考案に係る信号波形表示装置の一実
施例を示すブロツク図、第２図は動作を示すタイ
ムチヤート、第３図は演算の方法を説明するため
の図、第４図は従来の信号波形表示装置の構成を
示すブロツク図、第５図は従来の時間差を測定す
る回路の構成図、第６図はその動作を示すタイム
チヤートである。
２０，２１……レジスタ、２２，２３……フリ
ツプフロツプ、２４，２５……ＡＮＤゲート、２
６……演算器、２７……補正器。
Fig. 1 is a block diagram showing an embodiment of the signal waveform display device according to the present invention, Fig. 2 is a time chart showing the operation, Fig. 3 is a diagram for explaining the calculation method, and Fig. 4 is a conventional one. FIG. 5 is a block diagram showing the configuration of a conventional signal waveform display device, FIG. 5 is a configuration diagram of a conventional circuit for measuring time differences, and FIG. 6 is a time chart showing its operation. 20, 21...Register, 22, 23...Flip-flop, 24, 25...AND gate, 2
6...Arithmetic unit, 27...Corrector.
Claims (1)
タル信号に変換し、このデジタル信号に基づいて
前記入力信号の波形を表示する信号波形表示装置
において、 前記入力信号が所定のレベルになつたときにト
リガ信号を発生するトリガ信号発生部と、このト
リガ信号発生部が発生したトリガ信号のトリガ時
点の前後の前記デジタル信号が入力され、これら
のデータおよびトリガレベルから前記トリガ信号
と前記サンプリング時点の時間間隔を演算する演
算器とを有し、この演算器の出力によつて前記入
力信号の表示を補正することを特徴とする信号波
形表示装置。[Claims for Utility Model Registration] A signal waveform display device that samples an input signal at a predetermined period, converts it into a digital signal, and displays the waveform of the input signal based on the digital signal, A trigger signal generation section that generates a trigger signal when the trigger signal reaches the level, and the digital signals before and after the trigger point of the trigger signal generated by this trigger signal generation section are input, and from these data and the trigger level, the trigger signal is generated. and an arithmetic unit that calculates a time interval between the sampling points, and the display of the input signal is corrected based on the output of the arithmetic unit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12452587U JPH0528526Y2 (en) | 1987-08-14 | 1987-08-14 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12452587U JPH0528526Y2 (en) | 1987-08-14 | 1987-08-14 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6430448U true JPS6430448U (en) | 1989-02-23 |
| JPH0528526Y2 JPH0528526Y2 (en) | 1993-07-22 |
Family
ID=31374334
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12452587U Expired - Lifetime JPH0528526Y2 (en) | 1987-08-14 | 1987-08-14 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0528526Y2 (en) |
-
1987
- 1987-08-14 JP JP12452587U patent/JPH0528526Y2/ja not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0528526Y2 (en) | 1993-07-22 |
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