JPS6457729A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS6457729A
JPS6457729A JP21445187A JP21445187A JPS6457729A JP S6457729 A JPS6457729 A JP S6457729A JP 21445187 A JP21445187 A JP 21445187A JP 21445187 A JP21445187 A JP 21445187A JP S6457729 A JPS6457729 A JP S6457729A
Authority
JP
Japan
Prior art keywords
resistance region
pattern
polycrystalline silicon
line width
impurity concentration
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP21445187A
Other languages
Japanese (ja)
Inventor
Fumiaki Ushiyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP21445187A priority Critical patent/JPS6457729A/en
Publication of JPS6457729A publication Critical patent/JPS6457729A/en
Pending legal-status Critical Current

Links

Landscapes

  • Testing Or Measuring Of Semiconductors Or The Like (AREA)

Abstract

PURPOSE:To eliminate the need for a plurality of patterns for measurement, and to improve space efficiency by forming a pattern for measuring line width extending over each region having different impurity concentration in a semiconductor device in which the regions having different impurity concentration are shaped in the same polycrystalline silicon film. CONSTITUTION:A pattern 15 for measuring line width is formed by photoetching a polycrystalline silicon film shaped onto a semiconductor substrate 11 through an oxide (SiO2) film 12. The polycrystalline silicon film has regions having different impurity concentration as a high resistance region 13 and a low resistance region 14 in the same film, and the pattern 15 for measuring line width is shaped extending over the high resistance region 13 and the low resistance region 14.
JP21445187A 1987-08-28 1987-08-28 Semiconductor device Pending JPS6457729A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP21445187A JPS6457729A (en) 1987-08-28 1987-08-28 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP21445187A JPS6457729A (en) 1987-08-28 1987-08-28 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS6457729A true JPS6457729A (en) 1989-03-06

Family

ID=16655977

Family Applications (1)

Application Number Title Priority Date Filing Date
JP21445187A Pending JPS6457729A (en) 1987-08-28 1987-08-28 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS6457729A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7301210B2 (en) 2006-01-12 2007-11-27 International Business Machines Corporation Method and structure to process thick and thin fins and variable fin to fin spacing
US7763531B2 (en) 2004-05-25 2010-07-27 International Business Machines Corporation Method and structure to process thick and thin fins and variable fin to fin spacing

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7763531B2 (en) 2004-05-25 2010-07-27 International Business Machines Corporation Method and structure to process thick and thin fins and variable fin to fin spacing
US7301210B2 (en) 2006-01-12 2007-11-27 International Business Machines Corporation Method and structure to process thick and thin fins and variable fin to fin spacing

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