JPS6457729A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number: JPS6457729A
Authority: JP; Japan
Prior art keywords: resistance region; pattern; polycrystalline silicon; line width; impurity concentration
Prior art date: 1987-08-28
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.): Pending

Application number

JP21445187A

Other languages

English (en)

Inventor

Fumiaki Ushiyama

Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)

Seiko Epson Corp

Original Assignee

Seiko Epson Corp

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

1987-08-28

Filing date

1987-08-28

Publication date

1989-03-06

1987-08-28 Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp

1987-08-28 Priority to JP21445187A priority Critical patent/JPS6457729A/ja

1989-03-06 Publication of JPS6457729A publication Critical patent/JPS6457729A/ja

Status Pending legal-status Critical Current

Links

239000004065 semiconductor Substances 0.000 title abstract 3
239000012535 impurity Substances 0.000 abstract 3
229910021420 polycrystalline silicon Inorganic materials 0.000 abstract 3
238000005259 measurement Methods 0.000 abstract 1
238000001259 photo etching Methods 0.000 abstract 1
239000000758 substrate Substances 0.000 abstract 1

Landscapes

Testing Or Measuring Of Semiconductors Or The Like (AREA)

JP21445187A 1987-08-28 1987-08-28 Semiconductor device Pending JPS6457729A (en)

Priority Applications (1)

Application Number	Priority Date	Filing Date	Title
JP21445187A JPS6457729A (en)	1987-08-28	1987-08-28	Semiconductor device

Applications Claiming Priority (1)

Application Number	Priority Date	Filing Date	Title
JP21445187A JPS6457729A (en)	1987-08-28	1987-08-28	Semiconductor device

Publications (1)

Publication Number	Publication Date
JPS6457729A true JPS6457729A (en)	1989-03-06

Family

ID=16655977

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
JP21445187A Pending JPS6457729A (en)	1987-08-28	1987-08-28	Semiconductor device

Country Status (1)

Country	Link
JP (1)	JPS6457729A (ja)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US7301210B2 (en)	2006-01-12	2007-11-27	International Business Machines Corporation	Method and structure to process thick and thin fins and variable fin to fin spacing
US7763531B2 (en)	2004-05-25	2010-07-27	International Business Machines Corporation	Method and structure to process thick and thin fins and variable fin to fin spacing

1987
- 1987-08-28 JP JP21445187A patent/JPS6457729A/ja active Pending

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US7763531B2 (en)	2004-05-25	2010-07-27	International Business Machines Corporation	Method and structure to process thick and thin fins and variable fin to fin spacing
US7301210B2 (en)	2006-01-12	2007-11-27	International Business Machines Corporation	Method and structure to process thick and thin fins and variable fin to fin spacing

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