JPS648492B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a Josephson pulse generation circuit configured using Josephson junction elements, which generates a narrow pulse output current from a pulse input current. .

2. Description of the Related Art As such a Josephson pulse generating circuit, one having the configuration described below with reference to FIG. 1 has been proposed.

That is, a Josephson gate circuit Q1 with a control line is inserted into the bias current line 1 and connected to the control current line 2, and takes a zero voltage state or a voltage state between both ends of the bias current line 1.

Further, the Josephson gate circuit Q2 with a control line is inserted into the bias current line 1 and connected to the control current lines 2 and 2', and takes a zero voltage state or a voltage state between both ends of the bias current line 1. .

Furthermore, it has a Josephson junction element or a Josephson gate circuit with a control line Q3 similar to the Josephson gate circuit with a control line Q1 or Q2. Hereinafter, it is assumed that a Josephson gate circuit with control lines Q3 similar to the Josephson gate circuit with control lines Q2 is provided.

It also has an inductor L.

Furthermore, it has a load M1.

This load M1 is inserted into a bias current line 1 which is inserted into an external bias current line 10, and is connected to a control current line 2, so that the control current line 1 is controlled to take a zero voltage state or a voltage applied state between both ends of the bias current line 1. Control current line 2 of Josephson gate circuit Q5 with wire and resistor R
It consists of a series circuit with 1.

Therefore, Josefson gate circuit with control line Q
1 bias current line 1 is external bias current line 5
is inserted.

Further, both ends of the bias current line 1 of the Josefson gate circuit with control line Q1 are connected via an inductor L to both ends of the bias current line 1 of the Josephson gate circuit with control line Q2.

Furthermore, Josephson gate circuit with control line Q1
A load M1 is connected between both ends of the bias current line 1 through the bias current line 1 of the Josefson gate circuit with control line Q3.

Further, the control current lines 2 of Josephson gate circuits Q1 and Q2 with control lines are connected in series and inserted into the pulse input current line 6.

Furthermore, Josephson gate circuit Q2 with control line
A control current line 2' is inserted into the external control current line 7.

Further, the control current line 2 of the Josefson gate circuit with control line Q3 is inserted into the external control current line 8.

Furthermore, Josephson gate circuit Q5 with control line
The bias current line 1 is connected to the external bias current line 10
It is inserted into the.

The above is the configuration of the conventionally proposed Josephson pulse generation circuit.

According to the Josephson pulse generation circuit having such a configuration, the following operation can be obtained.

That is, while supplying the control current I _c to the external control current line 7 and therefore supplying the control current I _c to the control current line 2' of the Josephson gate circuit Q2 with a control line, the external bias current A bias current I _b is supplied to line 5 as shown in FIG. 2A.

In this case, the inductor L is inserted in the current path including the bias current line 1 of the Josephson gate circuit with control line Q2, and the current path including the bias current line 1 of the Josephson gate circuit with control line Q3 is inserted. Since the load M1 is inserted in the current path, most of the bias current _Ib flows into the bias current line 1 of the Josephson gate circuit Q1 with control line.

In this state, as shown in FIG. 2B, a pulse input current I _i consisting of pulse currents at time points t1, t2, . . . is supplied to the pulse input current line 6.

In this case, the pulse input current I _i is connected to the control current line 2 of Josephson gate circuit with control line Q1.
As a result, Josephson gate circuit Q1 with control line transitions from zero voltage state to voltage state,
A voltage state is obtained between both ends of the bias current line 1 of the Josefson gate circuit with control line Q1.

Josephson gate circuit 1 with control line like this
If a voltage state is obtained between both ends of the bias current line 1, the bias current I _b is flows to the load M1 through the bias current line 1 of the Josefson gate circuit with control line Q3. As a result, the Josephson gate circuit Q3 with control line transitions from the zero voltage state to the voltage state, and the current that has been flowing through the load M1 stops flowing. Therefore, the load M1
Then, as shown in FIG. 2C, a pulse output current I _p is obtained.

Furthermore, if the Josephson gate circuit Q3 with a control line is transferred from the zero voltage state to the voltage state, the bias current I _b that has been flowing to the load M1 will be transferred to the control line via the inductor L. The bias current flows through the bias current line 1 of Josephson gate circuit Q2.

However, at this time, the pulse input current I _i is supplied from the pulse input current line 6 to the control current line 2 of the Josefson gate circuit with control line Q2. On the other hand, Josephson gate circuit with control line Q2
A control current Ic is supplied to the control current line 2'. Therefore, Josephson gate circuit Q2 with control line maintains a zero voltage state.

In this state, when the pulse input current I _i that has been supplied to the pulse input current line 6 disappears, the control current I _c is supplied to the control current line 2' of the Josephson gate circuit with control line Q2. Although it has been
Since no current is supplied to the control current line 2 of Josephson gate circuit with control line Q2,
The Josephson gate circuit with control line Q2 transitions from the zero voltage state to the voltage state, and a voltage state is obtained between both ends of the bias current line 1 of the Josephson gate circuit with control line Q2.

Therefore, the bias current I _b that has been flowing through the bias current line 1 of the Josephson gate circuit with control line Q2 flows into the bias current line 1 of the Josephson gate circuit with control line Q1.

In this way, the same state as when the bias current Ib was supplied to the external bias current line 5 is restored.

As described above, according to the conventional Josephson pulse generation circuit shown in FIG.
By supplying the bias current I _b to the external bias current line 5 while supplying the control current I _c to the external bias current line 5, and then supplying the pulse input current I _i to the pulse input current line 6, the load is controlled. A pulse output current narrower in width than the pulse input current I _i can be obtained from M1.

Problems to be Solved by the Invention However, in the case of the conventional Josephson pulse generation circuit shown in _FIG . When the bias current I _b flows into the bias current line 1 of the Josephson gate circuit Q2 with a control line through the inductor L, the Josephson gate circuit with a control line By supplying the pulse input current Ii from the pulse input current line 6 to the control current line 2 of the gate circuit Q2, the Josephson gate circuit with control line Q2 transitions from a zero voltage state to a voltage applied state. By doing so, the above-mentioned operation is performed normally.

In this case, the pulse input current I _i needs to have a predetermined level.

Therefore, in the case of the conventional Josephson pulse generation circuit shown in FIG. 1, the pulse input current I _i supplied to the pulse input current line 6 has a trapezoidal waveform as shown in FIG. 2B. If it has an arbitrary waveform as shown in FIG. 2C, there is a risk that the above-mentioned normal operation may not be obtained. It had the following drawback.

Also, since it is necessary to provide an external control current line 7 and supply the control current I _c to it,
This had the disadvantage that the Josephson pulse generation circuit as a whole became complicated.

Means for Solving the Problems The present invention therefore seeks to propose a new Josephson pulse generation circuit that does not have the above-mentioned drawbacks.

The Josephson pulse generation circuit according to the present invention includes:
As in the case of the conventional Josephson pulse generating circuit described above in FIG. Josephson gate circuit with first and second control lines, and a first
a Josephson junction element or a third Josephson gate circuit with a control line, which is inserted into the bias current line and coupled to the control current line, and takes a zero voltage state or a voltage state between both ends of the bias current line; It has an inductor and a first load.

The bias current line of the first Josephson gate circuit with control line is inserted into the first external bias current line, and the bias current line of the first Josephson gate circuit with control line is inserted into the first external bias current line. are connected to both ends of the bias current line of the second Josefson gate circuit with control line via the inductor, and further connected to both ends of the bias current line of the first Josephson gate circuit with control line. The first load is connected between both ends of the bias current line of the first Josephson junction element or the third Josephson gate circuit with control line,
Furthermore, the control current lines of the first and second Josephson gate circuits with control lines are connected in series and inserted into the pulse input current line.

However, in the Josephson pulse generation circuit according to the present invention having such a configuration, the Josephson pulse generation circuit is inserted into the second Josephson junction element or the bias current line, and the control current line is coupled to the second Josephson junction element or the bias current line. The Josephson gate circuit with a fourth control line has a zero voltage state or a voltage state between both ends of the bias current line, and a second load, and the Josephson gate circuit with a control line has a second load. The second load is connected between both ends of the bias current line of the gate circuit via the second Josephson junction element or the bias current line of the fourth Josephson gate circuit with control line and the inductor. It has a configuration in which it is connected.

Function According to the Josephson pulse generation circuit according to the present invention, as in the case of the conventional Josephson pulse generation circuit described above in FIG. 1, a bias current is supplied to the first external bias current line. In this state, by supplying a pulse input current to the pulse input current line, pulse output currents having a narrow width can be obtained at the first and second loads.

However, in the Josephson pulse generation circuit according to the present invention, even if the pulse input current supplied to the pulse input current line does not have a trapezoidal wave,
Even when the waveform has an arbitrary waveform, normal operation can be obtained and a pulse output current can be obtained.

Further, in this case, there is no need to provide an external control current line and supply a control current thereto, unlike in the case of the conventional Josephson pulse generation circuit described above with reference to FIG.

Effects of the Present Invention Therefore, according to the Josephson pulse generation circuit according to the present invention, even if the pulse input current has an arbitrary waveform, a pulse output current having a narrower width than that of the pulse input current can be obtained with a simple configuration. It has the effect of being able to.

Embodiment 1 FIG. 3 shows a first embodiment of the Josephson pulse generation circuit according to the present invention.

In FIG. 3, parts corresponding to those in FIG. 1 are designated by the same reference numerals, and detailed description thereof will be omitted.

The Josephson pulse generation circuit according to the present invention shown in FIG. 3 has the same configuration as the conventional Josephson pulse generation circuit described above in FIG. 1, except for the following points.

In other words, Josefson gate circuit Q with control line
2, the control current line 2' is omitted, and the external control current line 7 is correspondingly omitted.

In addition, Josephson gate circuit Q5 with control line
However, in addition to the control current line 2, it has another control current line 2'.

Furthermore, a Josephson junction element or a Josephson gate circuit with a control line is inserted into the bias current line 1 and connected to the control current line 2, and takes a zero voltage state or a voltage state between both ends of the bias current line 1. It has a Josephson gate circuit Q4 with a control line similar to Q3, or a Josephson junction element. In the following, it is assumed that a Josephson gate circuit Q4 with a control line is included.

Furthermore, it has a load M2.

This load M2 is composed of a series circuit of the control current line 2' of the Josefson gate circuit with control line Q5 and a resistor R2.

Therefore, Josefson gate circuit with control line Q
Between both ends of the bias current line 1 of No. 1, the bias current line 1 of Josephson gate circuit Q4 with control line,
A load M2 is connected via an inductor L.

Further, the control current line 2 of the Josefson gate circuit with control line Q4 is inserted into the external control current line 9.

The above is the configuration of the first embodiment of the Josephson pulse generation circuit according to the present invention.

According to the Josephson pulse generation circuit according to the present invention having such a configuration, the following operation can be obtained.

That is, the control current I _r is supplied to the external control current lines 8 and 9, and therefore the control current is supplied to the control current line 2 of the Josephson gate circuit with control line Q3 and Q4.
While supplying I _r , the external bias current line 5
Then, as shown in FIG. 4A, a bias current I _b is supplied.

In such a case, an inductor L is inserted in the current path including the bias current line 1 of the Josefson gate circuits Q2 and Q4 with control lines, and a current path including the bias current line 1 of the Josephson gate circuit Q3 with control lines is inserted. Since the load M1 is inserted in the current path, most of the bias current _Ib flows into the bias current line 1 of the Josephson gate circuit Q1 with control line.

In this state, as shown in FIG. 4B, a pulse input current I _i consisting of pulse currents at time points t1, t2, . . . is supplied to the pulse input current line 6.

In this case, the pulse input current I _i is connected to the control current line 2 of Josephson gate circuit with control line Q1.
Therefore, a voltage state is obtained between both ends of the bias current line 1 of the Josefson gate circuit with control line Q1.

In this way, if a voltage state is obtained between both ends of the bias current line 1 of the Josefson gate circuit with control line Q1, the Josephson gate circuit with control line Q
Since the inductor L is inserted in the current path including the bias current line 1 of Q2 and Q4, the bias current
I _b flows to the load M1 through the bias current line 1 of the Josefson gate circuit with control line Q3.

For this reason, Josephson gate circuit with control line Q
3 transitions from the zero voltage state to the voltage state, and the current that has been flowing through the load M1 stops flowing.

Therefore, as shown in FIG. 4C, the load M1 is
The pulse output current I _p is at the time t of the pulse input current I _i
It is obtained based on a pulsed current at 1.

Furthermore, if the Josephson gate circuit Q3 with a control line is transferred from the zero voltage state to the voltage state, the bias current I _b that has been flowing to the load M1 will be transferred to the control line via the inductor L. The bias current flows through the bias current line 1 of Josephson gate circuit Q2.

In this case, Josephson gate circuit with control line Q
The current path including the bias current line 1 of No. 4 has a load M
2 is inserted, the bias current I _b does not flow to the bias current line 1 of the Josephson gate circuit Q4 with control line.

In addition, the bias current I _b that flows in the bias current line 1 of the Josefson gate circuit Q2 with a control line flows later than the point at which the pulse output current I _p can no longer be obtained due to the inductance L. Before the bias current Ib flows into the bias current line 1 of the Josephson gate circuit Q2 with a control line, the pulse current at time t1 of the pulse input current _Ii is no longer available. Therefore, Josephson gate circuit Q2 with control line maintains a zero voltage state, and bias current I _b is passed through external bias current line 5 to bias current line 1 thereof.

Further, after the pulse output current I _p becomes unobtainable, a pulse is applied to the control current line 2 of the Josephson gate circuit with control line Q1 during a period before the pulse input current I _i at time t1 becomes unobtainable. Even if a current based on the input current I _i flows, the Josephson gate circuit with control line Q1 maintains the voltage state because it is already in the voltage state.

However, as described above, if the pulse input current I _i is no longer obtained, the Josephson gate circuit with control line Q1 returns from the voltage state to the zero voltage state.

For this reason, Josephson gate circuit with control line Q
1 bias current line 1 as well as external bias current line 5
Bias current I _b flows through.

However, in this case, since a superconducting loop including the bias current line 1 and inductor L of the Josephson gate circuits with control lines Q1 and Q2 is formed, the Josephson gate with control lines is included in the superconducting loop. The bias current I _b flowing through the bias current line 1 of the circuit Q2 is applied as a circulating current to the bias current line 1 of the Josephson gate circuit with control line Q1.
As seen above, the bias current I _b flows in the opposite direction to the external bias current line 5 .

Therefore, the bias current I _b from the external bias current line 5 is applied to the Josephson gate circuit with control line Q1.
Therefore, almost _all of the bias current Ib supplied to the external bias current line 5 flows through the bias current line 1 of the Josephson gate circuit Q2 with control line. This means that

In this state, if a pulse current next to the pulse input current I _i is obtained from the pulse input current line 6 at time t2, it is supplied to the control current line 2 of the Josephson gate circuit with control line Q2. Therefore, Josephson gate circuit Q2 with control line transitions from zero voltage state to voltage applied state.

Josephson gate circuit Q with control line like this
2 transitions from the zero voltage state to the voltage state, the bias current I _b that has been flowing in the bias current line 1 of the Josephson gate circuit Q2 with control line
flows to the load M2 through the bias current line 1 of the Josefson gate circuit with control line Q4.

For this reason, Josephson gate circuit with control line Q
4 transitions from a zero-voltage state to a voltage-applied state, and the bias current I _b that has been flowing to the load M2 no longer flows.

Therefore, as shown in FIG. 4D, the load M2 is
A pulse output current I _p ' is obtained.

In addition, when the Josephson gate circuit with control line Q4 transitions from the zero voltage state to the voltage state, at this time, the Josephson gate circuit with control line Q2 has returned to the voltage state. The above-mentioned circulating current stops flowing, and therefore, the bias current I _b that has been flowing to the load M2 is now transferred to the bias current line 1 of the Josephson gate circuit with control line Q1.
It will flow to

In the manner described above, all Josephson gate circuits Q1 to Q5 with control lines return to the same state as when the bias current _Ib was supplied to the external bias current line 5.

As mentioned above, according to the Josephson pulse generation circuit according to the present _invention shown in FIG. By sequentially supplying the pulse output current I _{p to the load M1, it is possible to sequentially obtain a pulse output current I p having a} narrower width than the first, third, ... pulse input current I i, and Further, it is possible to sequentially obtain a pulse output current I _p ' narrower than the second, fourth, . . . pulse input current I _i to the load M2.

Therefore, according to the Josephson pulse generation circuit according to the present invention shown in FIG. 3, based on the pulse input current I _i , as described above in FIG. _p and I _p ' can be generated.

However, in this case, normal operation can be obtained even if the pulse input current Ii is not a trapezoidal waveform but has an arbitrary waveform.

In this case, the Josephson gate circuit with control line Q5 is controlled by the pulse output current I p based on the odd-number pulse input current I _i and also by the pulse output current I _p based on the odd-number pulse input current I _i. Motozuku pulse output current
I _p ' also causes a transition from a zero-voltage state to a voltage-applied state.

Example 2 FIG. 5 shows a second embodiment of the invention.

In FIG. 5, parts corresponding to those in FIG. 3 are designated by the same reference numerals, and detailed description thereof will be omitted.

The Josephson pulse generating circuit according to the present invention shown in FIG. 5 has the same configuration as the Josephson pulse generating circuit according to the present invention described above in FIG. 3, except for the following points.

In other words, Josefson gate circuit Q with control line
5, the control current line 2', which together with its resistor R2 constitutes the load M2, is omitted, and the load M2 accordingly consists only of the resistor R2. The above is the configuration of the second embodiment of the Josephson pulse generation circuit according to the present invention.

According to the Josephson pulse generation circuit according to the present invention having such a configuration, it is the same as the configuration of the Josephson pulse generation circuit according to the present invention described above in FIG. 3, except for the above-mentioned matters. Although detailed explanation will be omitted, the same operation and effect as the Josephson pulse generation circuit according to the present invention described above with reference to FIG. 3 can be obtained. However, in this case, the Josephson gate circuit with control line Q5 transitions from the zero voltage state to the voltage state only by the pulse output current Io obtained based on the odd-numbered pulse input current _Ii . perform an action.

[Brief explanation of the drawing]

FIG. 1 is a connection diagram showing a conventional Josephson pulse generation circuit. FIG. 2 is a waveform diagram for explaining the operation. FIG. 3 is a connection diagram showing a first embodiment of the Josephson pulse generation circuit according to the present invention. FIG. 4 is a waveform diagram for explaining the operation. FIG. 5 is a connection diagram showing a second embodiment of the Josephson pulse generation circuit according to the present invention. 1... Bias current line, 2, 2... Control current line, 5... External bias current line, 6... Pulse input current line, 7... External control current line, Q1 to Q5...
... Josephson gate circuit with control line, R1, R2
...Resistance, M1...Load, L...Inductor.

Claims (1)

[Claims] 1 Josephson with first and second control lines which are inserted into the bias current line and coupled to the control current line, and take a zero voltage state or a voltage state between both ends of the bias current line. a gate circuit, and a third control line-equipped circuit which is inserted into the first Josephson junction element or the bias current line and is coupled to the control current line, and which takes a zero voltage state or a voltage state between both ends of the bias current line. It has a Josephson gate circuit, an inductor, and a first load, the bias current line of the Josephson gate circuit with a control line is inserted into the first external bias current line, and the bias current line of the Josephson gate circuit with a control line is inserted into the first external bias current line, Both ends of the bias current line of the first Josefson gate circuit with control line are connected to both ends of the bias current line of the second Josephson gate circuit with control line via the inductor, The first load is connected between both ends of the bias current line of the Josefson gate circuit with control line, via the bias current line of the first Josephson junction element or the third Josephson gate circuit with control line. is connected, and the control current lines of the first and second Josephson gate circuits with control lines are connected in series and inserted into the pulse input current line, or a fourth Josephson gate circuit with a control line, which is inserted into the bias current line and connected to the control current line, and takes a zero voltage state or a voltage state between both ends of the bias current line; , a second load, and between both ends of the bias current line of the first Josephson gate circuit with control lines, the second Josephson junction element or the fourth Josephson gate with control lines. A Josephson pulse generation circuit characterized in that the second load is connected via a bias current line of the circuit and the inductor. 2. In the Josephson pulse generation circuit according to claim 1, the two control current lines are inserted into the bias current line and connected to each other, so that a zero voltage state or a voltage applied state is established between both ends of the bias current line. a fifth Josephson gate circuit with a control line, the bias current line of the fifth Josephson gate circuit with a control line is inserted into the second external bias current line, The load is connected to one of the two control current lines of the Josephson gate circuit with the fifth control line,
The second load is connected to the other of the two control current lines of the Josephson gate circuit with the fifth control line, and
A Josephson pulse generation circuit comprising a series circuit with a second resistor. 3. In the Josephson pulse generation circuit as set forth in claim 1, the first pulse generator is inserted into the bias current line and connected to the control current line, and has a zero voltage state or a voltage applied state between both ends of the bias current line. 5 Josephson gate circuit with control line, the bias current line of the fifth Josephson gate circuit with control line is inserted into the second external bias current line, and the first load is , a series circuit of the control current line of the Josephson gate circuit with control line and a first resistor, and the second load is a second resistor. Son pulse generation circuit.