JPS64873A - Reproducing device - Google Patents

Reproducing device

Info

Publication number
JPS64873A
JPS64873A JP62155873A JP15587387A JPS64873A JP S64873 A JPS64873 A JP S64873A JP 62155873 A JP62155873 A JP 62155873A JP 15587387 A JP15587387 A JP 15587387A JP S64873 A JPS64873 A JP S64873A
Authority
JP
Japan
Prior art keywords
read
pulse
data
memory
signals
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62155873A
Other languages
Japanese (ja)
Other versions
JPH01873A (en
Inventor
Toshiaki Furuya
Kunio Suesada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP62-155873A priority Critical patent/JPH01873A/en
Priority claimed from JP62-155873A external-priority patent/JPH01873A/en
Publication of JPS64873A publication Critical patent/JPS64873A/en
Publication of JPH01873A publication Critical patent/JPH01873A/en
Pending legal-status Critical Current

Links

Landscapes

  • Television Signal Processing For Recording (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)

Abstract

PURPOSE: To obtain a continuous and good picture excluding the omission of the picture by deciding whether a prescribed write period terminates or not according to a reproduced address, and controlling the switching timing of the write and the read of a memory.
CONSTITUTION: A field pulse 9 and an EOF pulse 16 are inputted to a read control circuit 3, and read enable signals RE1, RE2 are outputted. Then, when the signals RE1, RE2 are 'H' level, data 8 is read out from the address RA of field memories 1, 2, corresponding to these signals. Here, when the timing pulse 16 to show the termination of the field of the reproduced data is outputted, the signals RE1, RE2 are inverted at the next pulse 9 according to a decision based on these data, and the memory, to which the data 7 has been written till then, is switched to be read, and the memory, from which the data 8 has been read till then, is switched to be written. Besides, when the next field pulse is inputted before the pulse 16 is outputted, the circuit 3 is left as it keeps a former state, and the write and the read of the memory are not switched.
COPYRIGHT: (C)1989,JPO&Japio
JP62-155873A 1987-06-23 playback device Pending JPH01873A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62-155873A JPH01873A (en) 1987-06-23 playback device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62-155873A JPH01873A (en) 1987-06-23 playback device

Publications (2)

Publication Number Publication Date
JPS64873A true JPS64873A (en) 1989-01-05
JPH01873A JPH01873A (en) 1989-01-05

Family

ID=

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63294191A (en) * 1987-05-27 1988-11-30 Hitachi Ltd Speed-changeable reproducing system

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63294191A (en) * 1987-05-27 1988-11-30 Hitachi Ltd Speed-changeable reproducing system

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