JPS6489392A - Manufacture of printed wiring board - Google Patents

Manufacture of printed wiring board

Info

Publication number
JPS6489392A
JPS6489392A JP24743387A JP24743387A JPS6489392A JP S6489392 A JPS6489392 A JP S6489392A JP 24743387 A JP24743387 A JP 24743387A JP 24743387 A JP24743387 A JP 24743387A JP S6489392 A JPS6489392 A JP S6489392A
Authority
JP
Japan
Prior art keywords
layers
throughhole
printed wiring
wiring board
masking material
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP24743387A
Other languages
Japanese (ja)
Other versions
JPH054840B2 (en
Inventor
Akira Enomoto
Motoo Asai
Toshihiko Yasue
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ibiden Co Ltd
Original Assignee
Ibiden Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibiden Co Ltd filed Critical Ibiden Co Ltd
Priority to JP24743387A priority Critical patent/JPS6489392A/en
Publication of JPS6489392A publication Critical patent/JPS6489392A/en
Publication of JPH054840B2 publication Critical patent/JPH054840B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42Plated through-holes or plated via connections
    • H05K3/425Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern
    • H05K3/426Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern initial plating of through-holes in substrates without metal

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)

Abstract

PURPOSE:To prepare with ease a printed wiring board having a highly reliable throughhole by forming the throughhole while boring and plating after a predetermined treatment of the board surface. CONSTITUTION:Adhesive agent layers 12 are formed on the surface of an insulating substrate 11, the surface of the layer 12 roughened so that it comes in good contact with a conductive circuit 16, etc. When a hole 14a to later be formed into a throughhole is bored after coating the layers 12 with a masking material 13, the roughened surface of the layers 12, protected by the masking material 13, does not get damaged. The masking material 13 is then removed and a catalyzer 15 is provided to the layers 12 and the hole 14a. Then resists are stacked on the layers 12, and a throughhole 14 is formed by electroless plating to make the circuit 16 and the layers 12 to come in good contact. According to this method, it is possible to easily prepare a printed wiring board having a highly reliable throughhole.
JP24743387A 1987-09-29 1987-09-29 Manufacture of printed wiring board Granted JPS6489392A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP24743387A JPS6489392A (en) 1987-09-29 1987-09-29 Manufacture of printed wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP24743387A JPS6489392A (en) 1987-09-29 1987-09-29 Manufacture of printed wiring board

Publications (2)

Publication Number Publication Date
JPS6489392A true JPS6489392A (en) 1989-04-03
JPH054840B2 JPH054840B2 (en) 1993-01-20

Family

ID=17163368

Family Applications (1)

Application Number Title Priority Date Filing Date
JP24743387A Granted JPS6489392A (en) 1987-09-29 1987-09-29 Manufacture of printed wiring board

Country Status (1)

Country Link
JP (1) JPS6489392A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20100140100A1 (en) * 2008-12-08 2010-06-10 Samsung Electro-Mechanics Co., Ltd. Manufacturing method of printed circuit board
AT511758A3 (en) * 2011-05-17 2013-12-15 Ksg Leiterplatten Gmbh Method for producing a semifinished product for a single-layer or multilayer printed circuit board and semifinished product

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5154259A (en) * 1974-11-07 1976-05-13 Tokyo Shibaura Electric Co Insatsuhaisenbanno seizohoho
JPS6094790A (en) * 1983-10-28 1985-05-27 株式会社日立製作所 Method of producing printed board

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5154259A (en) * 1974-11-07 1976-05-13 Tokyo Shibaura Electric Co Insatsuhaisenbanno seizohoho
JPS6094790A (en) * 1983-10-28 1985-05-27 株式会社日立製作所 Method of producing printed board

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20100140100A1 (en) * 2008-12-08 2010-06-10 Samsung Electro-Mechanics Co., Ltd. Manufacturing method of printed circuit board
AT511758A3 (en) * 2011-05-17 2013-12-15 Ksg Leiterplatten Gmbh Method for producing a semifinished product for a single-layer or multilayer printed circuit board and semifinished product
AT511758B1 (en) * 2011-05-17 2014-03-15 Ksg Leiterplatten Gmbh Method for producing a semifinished product for a single-layer or multilayer printed circuit board and semifinished product

Also Published As

Publication number Publication date
JPH054840B2 (en) 1993-01-20

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