JPS649748B2 - - Google Patents

Info

Publication number
JPS649748B2
JPS649748B2 JP58019742A JP1974283A JPS649748B2 JP S649748 B2 JPS649748 B2 JP S649748B2 JP 58019742 A JP58019742 A JP 58019742A JP 1974283 A JP1974283 A JP 1974283A JP S649748 B2 JPS649748 B2 JP S649748B2
Authority
JP
Japan
Prior art keywords
logic
circuit
quantum interference
split
wiring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP58019742A
Other languages
English (en)
Japanese (ja)
Other versions
JPS59147471A (ja
Inventor
Yutaka Harada
Kunio Yamashita
Hideaki Nakane
Nobuo Kodera
Ushio Kawabe
Mikio Hirano
Junji Shigeta
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National Institute of Advanced Industrial Science and Technology AIST
Original Assignee
Agency of Industrial Science and Technology
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Agency of Industrial Science and Technology filed Critical Agency of Industrial Science and Technology
Priority to JP58019742A priority Critical patent/JPS59147471A/ja
Publication of JPS59147471A publication Critical patent/JPS59147471A/ja
Publication of JPS649748B2 publication Critical patent/JPS649748B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Superconductor Devices And Manufacturing Methods Thereof (AREA)
  • Logic Circuits (AREA)
JP58019742A 1983-02-10 1983-02-10 ジヨセフソン論理集積回路 Granted JPS59147471A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58019742A JPS59147471A (ja) 1983-02-10 1983-02-10 ジヨセフソン論理集積回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58019742A JPS59147471A (ja) 1983-02-10 1983-02-10 ジヨセフソン論理集積回路

Publications (2)

Publication Number Publication Date
JPS59147471A JPS59147471A (ja) 1984-08-23
JPS649748B2 true JPS649748B2 (fr) 1989-02-20

Family

ID=12007783

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58019742A Granted JPS59147471A (ja) 1983-02-10 1983-02-10 ジヨセフソン論理集積回路

Country Status (1)

Country Link
JP (1) JPS59147471A (fr)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61281718A (ja) * 1985-06-07 1986-12-12 Agency Of Ind Science & Technol ジヨセフソン論理集積回路
US5202284A (en) * 1989-12-01 1993-04-13 Hewlett-Packard Company Selective and non-selective deposition of Si1-x Gex on a Si subsrate that is partially masked with SiO2

Also Published As

Publication number Publication date
JPS59147471A (ja) 1984-08-23

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