KR920701830A - Ic 시험장치 - Google Patents
Ic 시험장치Info
- Publication number
- KR920701830A KR920701830A KR1019910701231A KR910701231A KR920701830A KR 920701830 A KR920701830 A KR 920701830A KR 1019910701231 A KR1019910701231 A KR 1019910701231A KR 910701231 A KR910701231 A KR 910701231A KR 920701830 A KR920701830 A KR 920701830A
- Authority
- KR
- South Korea
- Prior art keywords
- test equipment
- test
- equipment
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/319—Tester hardware, i.e. output processing circuits
- G01R31/31903—Tester hardware, i.e. output processing circuits tester configuration
- G01R31/31908—Tester set-up, e.g. configuring the tester to the device under test [DUT], down loading test patterns
- G01R31/3191—Calibration
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2801—Testing of printed circuits, backplanes, motherboards, hybrid circuits or carriers for multichip packages [MCP]
- G01R31/2806—Apparatus therefor, e.g. test stations, drivers, analysers, conveyors
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2882—Testing timing characteristics
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/319—Tester hardware, i.e. output processing circuits
- G01R31/31903—Tester hardware, i.e. output processing circuits tester configuration
- G01R31/31905—Interface with the device under test [DUT], e.g. arrangements between the test head and the DUT, mechanical aspects, fixture
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R35/00—Testing or calibrating of apparatus covered by the other groups of this subclass
- G01R35/02—Testing or calibrating of apparatus covered by the other groups of this subclass of auxiliary devices, e.g. of instrument transformers according to prescribed transformation ratio, phase angle, or wattage rating
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Tests Of Electronic Circuits (AREA)
- Testing Of Individual Semiconductor Devices (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP90-23704 | 1990-02-02 | ||
| JP2023704A JP2831780B2 (ja) | 1990-02-02 | 1990-02-02 | Ic試験装置 |
| PCT/JP1991/000125 WO1991011728A1 (en) | 1990-02-02 | 1991-02-01 | Ic testing device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR920701830A true KR920701830A (ko) | 1992-08-12 |
| KR960007508B1 KR960007508B1 (ko) | 1996-06-05 |
Family
ID=12117756
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1019910701231A Expired - Fee Related KR960007508B1 (ko) | 1990-02-02 | 1991-02-01 | Ic 시험장치 |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US5225775A (ko) |
| EP (1) | EP0466939B1 (ko) |
| JP (1) | JP2831780B2 (ko) |
| KR (1) | KR960007508B1 (ko) |
| DE (1) | DE69115776T2 (ko) |
| WO (1) | WO1991011728A1 (ko) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100936707B1 (ko) * | 2006-10-20 | 2010-01-13 | 요코가와 덴키 가부시키가이샤 | 반도체 시험 장치의 타이밍 교정 회로 및 타이밍 교정 방법 |
Families Citing this family (34)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0622636A1 (en) * | 1993-04-29 | 1994-11-02 | International Business Machines Corporation | Method for improving accuracy tester auto-calibration |
| DE4314324C1 (de) * | 1993-04-30 | 1994-07-28 | Siemens Ag | Verfahren zum kollisionsfreien Testbetrieb eines Prüflings |
| US5682472A (en) * | 1995-03-17 | 1997-10-28 | Aehr Test Systems | Method and system for testing memory programming devices |
| US6469493B1 (en) * | 1995-08-01 | 2002-10-22 | Teradyne, Inc. | Low cost CMOS tester with edge rate compensation |
| US5894081A (en) * | 1996-03-15 | 1999-04-13 | Intel Corporation | Method and apparatus for adjusting output signals from a semiconductor device to fulfill a timing specification |
| JPH09318704A (ja) * | 1996-05-30 | 1997-12-12 | Ando Electric Co Ltd | Ic試験装置 |
| JPH10170603A (ja) * | 1996-12-13 | 1998-06-26 | Ando Electric Co Ltd | Icテスタのキャリブレーション方法 |
| US6073259A (en) * | 1997-08-05 | 2000-06-06 | Teradyne, Inc. | Low cost CMOS tester with high channel density |
| US6060898A (en) * | 1997-09-30 | 2000-05-09 | Credence Systems Corporation | Format sensitive timing calibration for an integrated circuit tester |
| JPH11304890A (ja) * | 1998-04-16 | 1999-11-05 | Nec Corp | Lsiテスタのテストパタン生成方法および装置 |
| JP4138163B2 (ja) * | 1999-07-07 | 2008-08-20 | 株式会社ルネサステクノロジ | Lsi試験装置およびそのタイミングキャリブレーション方法 |
| JP2001035188A (ja) * | 1999-07-26 | 2001-02-09 | Fujitsu Ltd | 半導体装置の試験方法及び半導体装置 |
| US6448799B1 (en) * | 1999-09-30 | 2002-09-10 | Hitachi Electronics Engineering Co., Ltd. | Timing adjustment method and apparatus for semiconductor IC tester |
| US6693436B1 (en) * | 1999-12-23 | 2004-02-17 | Intel Corporation | Method and apparatus for testing an integrated circuit having an output-to-output relative signal |
| US6745342B1 (en) * | 1999-12-29 | 2004-06-01 | Infineon Technologies North America Corp. | Universal serial bus transceiver shortcut protection |
| US6901562B2 (en) | 2000-01-18 | 2005-05-31 | Cadence Design Systems, Inc. | Adaptable circuit blocks for use in multi-block chip design |
| US7181705B2 (en) | 2000-01-18 | 2007-02-20 | Cadence Design Systems, Inc. | Hierarchical test circuit structure for chips with multiple circuit blocks |
| JP3584850B2 (ja) * | 2000-04-24 | 2004-11-04 | 日本電気株式会社 | 電子装置用基板およびスイッチ機能付きソケット |
| US6609077B1 (en) | 2000-05-31 | 2003-08-19 | Teradyne, Inc. | ATE timing measurement unit and method |
| KR100574933B1 (ko) * | 2000-06-16 | 2006-05-02 | 삼성전자주식회사 | 테스트 시스템의 채널 스큐를 줄이기 위한 조정방법 |
| EP1473573B1 (en) * | 2000-06-28 | 2007-04-18 | Cadence Design Systems, Inc. | Intelligent test adapter |
| WO2002003146A2 (en) * | 2000-07-06 | 2002-01-10 | Igor Anatolievich Abrosimov | Interface device with stored data on transmission lines characteristics |
| JP2002040108A (ja) * | 2000-07-27 | 2002-02-06 | Advantest Corp | 半導体デバイス試験装置のタイミング校正方法・半導体デバイス試験装置 |
| JP2003035747A (ja) * | 2001-07-19 | 2003-02-07 | Mitsubishi Electric Corp | 半導体検査システムおよび半導体検査方法 |
| JP2003098222A (ja) * | 2001-09-25 | 2003-04-03 | Mitsubishi Electric Corp | 検査用基板、検査装置及び半導体装置の検査方法 |
| KR100459698B1 (ko) * | 2002-02-08 | 2004-12-04 | 삼성전자주식회사 | 병렬검사되는 개수를 증가시키는 반도체 소자의 전기적검사방법 |
| US7151389B2 (en) * | 2004-03-05 | 2006-12-19 | Qualitau, Inc. | Dual channel source measurement unit for semiconductor device testing |
| US7202687B2 (en) * | 2004-04-08 | 2007-04-10 | Formfactor, Inc. | Systems and methods for wireless semiconductor device testing |
| KR100736673B1 (ko) * | 2006-08-01 | 2007-07-06 | 주식회사 유니테스트 | 반도체 소자 테스트 장치 |
| JP5429727B2 (ja) * | 2007-08-24 | 2014-02-26 | ワイアイケー株式会社 | 半導体試験装置 |
| JP5023983B2 (ja) * | 2007-11-14 | 2012-09-12 | 横河電機株式会社 | 半導体試験装置 |
| US7755375B2 (en) * | 2008-01-08 | 2010-07-13 | Advantest Corporation | Test apparatus, probe card, and test method |
| CN102955732A (zh) * | 2011-08-29 | 2013-03-06 | 鸿富锦精密工业(深圳)有限公司 | Cpu测试系统及其测试治具 |
| IT202100015431A1 (it) * | 2021-06-14 | 2022-12-14 | Belvedere S R L | Dispositivo di connessione elettro-meccanica per apparecchiature da testare |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| USRE31056E (en) * | 1977-03-23 | 1982-10-12 | Fairchild Camera & Instrument Corp. | Computer controlled high-speed circuit for testing electronic devices |
| US4354268A (en) * | 1980-04-03 | 1982-10-12 | Santek, Inc. | Intelligent test head for automatic test system |
| JPS5739363A (en) * | 1980-08-20 | 1982-03-04 | Nec Corp | Testing device |
| JPS5832178A (ja) * | 1981-08-19 | 1983-02-25 | Advantest Corp | Icテスタ |
| US4994732A (en) * | 1985-12-18 | 1991-02-19 | Schlumberger Technologies, Inc. | Automatic test system having a "true tester-per-pin" architecture |
-
1990
- 1990-02-02 JP JP2023704A patent/JP2831780B2/ja not_active Expired - Fee Related
-
1991
- 1991-02-01 KR KR1019910701231A patent/KR960007508B1/ko not_active Expired - Fee Related
- 1991-02-01 US US07/768,587 patent/US5225775A/en not_active Expired - Lifetime
- 1991-02-01 DE DE69115776T patent/DE69115776T2/de not_active Expired - Fee Related
- 1991-02-01 WO PCT/JP1991/000125 patent/WO1991011728A1/ja not_active Ceased
- 1991-02-01 EP EP91903698A patent/EP0466939B1/en not_active Expired - Lifetime
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100936707B1 (ko) * | 2006-10-20 | 2010-01-13 | 요코가와 덴키 가부시키가이샤 | 반도체 시험 장치의 타이밍 교정 회로 및 타이밍 교정 방법 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH03228343A (ja) | 1991-10-09 |
| US5225775A (en) | 1993-07-06 |
| DE69115776D1 (de) | 1996-02-08 |
| DE69115776T2 (de) | 1996-06-05 |
| EP0466939B1 (en) | 1995-12-27 |
| KR960007508B1 (ko) | 1996-06-05 |
| EP0466939A4 (en) | 1992-10-14 |
| JP2831780B2 (ja) | 1998-12-02 |
| WO1991011728A1 (en) | 1991-08-08 |
| EP0466939A1 (en) | 1992-01-22 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A201 | Request for examination | ||
| PA0105 | International application |
St.27 status event code: A-0-1-A10-A15-nap-PA0105 |
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| PA0201 | Request for examination |
St.27 status event code: A-1-2-D10-D11-exm-PA0201 |
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| R17-X000 | Change to representative recorded |
St.27 status event code: A-3-3-R10-R17-oth-X000 |
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| PG1501 | Laying open of application |
St.27 status event code: A-1-1-Q10-Q12-nap-PG1501 |
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