WO2005015965A1 - Carte de circuit imprime formee d'une couche de ruthenium et produit comprenant cette derniere - Google Patents
Carte de circuit imprime formee d'une couche de ruthenium et produit comprenant cette derniere Download PDFInfo
- Publication number
- WO2005015965A1 WO2005015965A1 PCT/JP2004/010702 JP2004010702W WO2005015965A1 WO 2005015965 A1 WO2005015965 A1 WO 2005015965A1 JP 2004010702 W JP2004010702 W JP 2004010702W WO 2005015965 A1 WO2005015965 A1 WO 2005015965A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- layer
- circuit board
- ruthenium
- conductive layer
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/24—Reinforcing of the conductive pattern
- H05K3/244—Finish plating of conductors, especially of copper conductors, e.g. for pads or lands
Definitions
- Circuit board having ruthenium layer formed thereon and product containing the same
- the present invention is used for electric products, electronic products, semiconductor products, solar cells, automobiles, and the like.
- the present invention relates to a circuit board having a circuit formed by a conductive layer on a base.
- Circuit boards in which a circuit is formed by pasting a Cu foil as a conductive layer on a base made of an insulator or a semiconductor and then etching the Cu foil are used for various purposes.
- Such a circuit board is generally used without any surface treatment on Cu constituting the surface.
- Patent Documents 1 to 3 there are known a few methods of preventing electrolytic corrosion or the like of a surface layer in a terminal of a connector or the like. The structure is completely different from that described above, and there is no offer or suggestion for the above-mentioned drastic solution.
- a copper plating layer is formed on a part of a wiring layer made of tungsten or molybdenum formed on an insulating base, and a metal made of platinum or ruthenium is further formed on the copper plating layer.
- a wiring board having a layer formed is known (Patent Document 4). 1 The problem that migration occurs in the wiring layer or the copper-plated layer is not recognized, and therefore there is no solution for the migration. Not mentioned.
- Patent Document 1 JP 2001-152385 A Patent Document 2: JP-A-2000-222960
- Patent Document 3 JP-A-11-260178
- Patent document 4 JP 2003-100952 A
- the present invention has been made in view of the above situation, and an object of the present invention is to prevent migration and electrolytic corrosion of a conductive layer forming a circuit, thereby shortening or breaking a circuit.
- the object of the present invention is to provide a circuit board which does not cause the problem.
- a circuit board of the present invention is a circuit board in which a circuit is formed on a base by a conductive layer composed of any of Cu, A1, or Ag, and Ni, Au , Ag or an alloy containing at least one of these metals, one or more underlayers are formed, and a ruthenium layer made of ruthenium is formed on the underlayer.
- a surface metal layer made of Au, Pt, Pd, Ag, Rh, Sn or an alloy containing at least one of these metals may be formed on the ruthenium layer.
- the product of the present invention includes the above-mentioned circuit board, and the product may be any one of an electric product, an electronic product, a semiconductor product, a solar cell, and an automobile. .
- the circuit board of the present invention has a structure in which a ruthenium layer is laminated on a conductive layer, so that the conductive layer is protected by the ruthenium layer, whereby the conduction of the conductive layer is reduced. Is prevented. Therefore, the circuit board of the present invention can prevent short circuits and disconnections from occurring, and can sufficiently cope with finer circuits and higher frequencies, and thus can be used for electrical products, electronic products, semiconductor products, solar cells, It can be provided for a wide range of uses such as automobiles. Brief Description of Drawings
- FIG. 1 is a schematic sectional view of a circuit board in which a conductive layer and a ruthenium layer are formed on a base.
- FIG. 2 is a schematic cross-sectional view of a circuit board having an underlayer formed between a conductive layer and a ruthenium layer.
- FIG. 3 is a schematic sectional view of a circuit board having a plurality of underlayers formed between a conductive layer and a ruthenium layer.
- FIG. 4 is a schematic sectional view of a circuit board having a surface metal layer formed on a ruthenium layer. Explanation of symbols
- circuit board 101 base, 102 conductive layer, 103 ruthenium layer, 104, 104a, 104b underlayer, 105 surface metal layer.
- a conductive layer 102 is formed on a base 101 so as to form a circuit, and a ruthenium layer 103 is further formed on the conductive layer 102. Configuration.
- any substrate can be used as long as it has been conventionally used as a substrate for a circuit board. Therefore, the thickness, width, length, and the like of the base, which may be made of an insulator or a semiconductor, are not limited at all.
- Examples thereof include those made of resin (polyimide, PET, PEN, glass fiber reinforced epoxy, liquid crystal polymer, and the like), various ceramics, glass, silicon, and the like.
- the conductive layer 102 of the present invention forms a circuit on the base 101, and is made of any one of Cu, A and Ag.
- the conductive layer is formed not only on one surface of the base but also on both surfaces as long as a circuit is formed. No problem.
- the method for forming the conductive layer is not particularly limited.
- the conductive layer may be a foil made of the metal adhered to a base with an adhesive or the like. Can also be formed by sputtering, vapor deposition or plating. Further, the conductive layer may be formed by a casting method.
- the method for forming a circuit using the conductive layer is not particularly limited. For example, an etching method, an additive method, a transfer method, a printing method, or the like can be appropriately selected. If a printing method or the like is selected, a circuit can be formed at the same time as the formation of the conductive layer.
- the ruthenium layer 103 of the present invention is made of ruthenium, and has an effect of effectively protecting the conductive layer by being formed on the underlayer 104 described later.
- ruthenium is composed of ruthenium (Ru) alone and does not include ruthenium alloys or ruthenium oxides. Not something.
- Such a ruthenium layer is preferably formed by plating and has a thickness of 0.005 to 1.5 / im, preferably 0.1 to 0.4 ⁇ m. Force S is preferred. If the thickness is less than 0.005 ⁇ m, it may not be possible to effectively prevent migration and electrolytic corrosion of the conductive layer, and if it exceeds 1.5 zm, if the cost increases, the force or the stress of the ruthenium layer itself Cracks may occur, and such cracks are not preferable because the conductive layer cannot be effectively protected.
- the plating method may be either an electroless plating method or an electric plating method, and may be a barrel plating device, a hook plating device, or a continuous plating device. Can be selected.
- an underlayer 104 can be formed between the conductive layer 102 and the ruthenium layer 103. Further, as shown in FIG. 3, a first underlayer 104a and a second underlayer are provided between the conductive layer 102 and the ruthenium layer 103, as shown in FIG. It can be formed as a plurality of layers such as 104b.
- Such an underlayer has an effect of leveling the surface of the conductive layer by carrying a scratch or a pinhole on the surface of the conductive layer.
- the adhesion of the ruthenium layer to the conductive layer is improved, and the protective effect of the ruthenium layer on the conductive layer is further improved, and the ruthenium layer is prevented from generating cracks due to its own stress. That can be S.
- Such an underlayer is formed by depositing Ni, Au, Ag, or an alloy containing at least one of these metals on the conductive layer, thereby forming 0.1-3 / im, preferably 0.5.
- the base layer is formed as a plurality of layers, it is preferable to form a plurality of layers having different compositions from each other and to form the layers so that their total thickness is within the above range.
- the plating method may be either an electroless plating method or an electric plating method.
- the apparatus may be a barrel plating apparatus, a hook plating apparatus or a continuous plating apparatus. Can be selected.
- a surface metal layer 105 can be formed on the ruthenium layer 103.
- Such a surface metal layer 105 can be formed on the entire surface or a part of the ruthenium layer, and the form of the formation can be changed by the action of the surface metal layer.
- the surface metal layer is not shown in FIG. 4, it goes without saying that the surface metal layer can be formed on the ruthenium layer even when the underlayer 104 is formed.
- the surface metal layer has various functions on the surface of the ruthenium layer, for example, various functions such as solderability, bonding property, and contact property. And an effect as a rationalization layer for rationalizing the steps after the formation of the ruthenium layer.
- Such a surface metal layer contains Au, Pt, Pd, Ag, Rh, Sn or at least one of these metals.
- the plating method may be either an electroless plating method or an electric plating method, and may be a barrel plating device, a hook plating device, or a continuous plating device. Can be selected.
- a product according to the present invention includes the circuit board 100 described above.
- Such products include electrical products, electronic products, semiconductor products, solar cells or automobiles.
- a 9 ⁇ m-thick conductive layer 102 made of Cu is formed on a 50 ⁇ m-thick polyimide film as a substrate 101 by a plurality of steps by a sputtering method and a plating method.
- ruthenium plating solution (ruthenium concentration 8.5 g / l, trade name: Ru_33, manufactured by Nichi-Chemcat Co., Ltd.) was used, pH 2.1, liquid temperature 65 ° C, current density 1.
- ruthenium concentration 8.5 g / l trade name: Ru_33, manufactured by Nichi-Chemcat Co., Ltd.
- pH 2.1 liquid temperature 65 ° C
- current density 1 current density 1.
- Example 1 the same processing as in Example 1 was performed up to the point where the ruthenium layer 103 was formed.
- the surface including the substrate and the ruthenium layer 103 was activated by immersing it in an activation bath containing 8% sulfuric acid at a liquid temperature of 40 ° C. for 1 minute. Thereafter, washing with pure water was performed five times.
- tin plating solution (tin concentration 60 g / l, Metas AM (trade name, manufactured by Uken Corporation) as an organic acid, 110 g / l, SBS as an additive (trade name, Uken Corporation) using the Ltd.) 20 cc / l including those), PHL. 0 or less, the liquid temperature 40 ° C, 2 minutes under the conditions of a current density of 2A / dm 2, by performing electrical plated by the liquid level adjustment, the ruthenium Tin (Sn) was formed on the layer 103 as a surface metal layer 105 having a thickness of 1.8 xm. Thereafter, after washing with pure water five times, the circuit board 100 having the surface metal layer was obtained by draining with dry air at 105 ° C and drying.
- tin plating solution tin concentration 60 g / l, Metas AM (trade name, manufactured by Uken Corporation) as an organic acid, 110 g / l, SBS as an additive (trade name, Uken Corporation) using the Ltd
- the surface metal layer made of tin had an effect of facilitating soldering to a part or the whole of the circuit.
- Example 1 As a comparative example, the circuit board precursor used in Example 1 (corresponding to a conventional circuit board) was used.
- the temperature and humidity in the high-temperature and high-humidity chamber were 60 ° C and 90%, respectively.
- a DC voltage of 3 V was applied to each of the circuit board of Example 1 and the circuit board precursor of the comparative example, After leaving it to stand for 8 hours, each surface state was observed and evaluated by energizing.
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Parts Printed On Printed Circuit Boards (AREA)
- Manufacturing Of Printed Wiring (AREA)
Abstract
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2003-287962 | 2003-08-06 | ||
| JP2003287962A JP2005057132A (ja) | 2003-08-06 | 2003-08-06 | 回路基板およびそれを含むことを特徴とする製品 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| WO2005015965A1 true WO2005015965A1 (fr) | 2005-02-17 |
Family
ID=34131493
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PCT/JP2004/010702 Ceased WO2005015965A1 (fr) | 2003-08-06 | 2004-07-28 | Carte de circuit imprime formee d'une couche de ruthenium et produit comprenant cette derniere |
Country Status (3)
| Country | Link |
|---|---|
| JP (1) | JP2005057132A (fr) |
| TW (1) | TW200511905A (fr) |
| WO (1) | WO2005015965A1 (fr) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH06216184A (ja) * | 1992-08-20 | 1994-08-05 | Toyota Autom Loom Works Ltd | 配線基板上の配線の表面処理方法 |
| JPH1068097A (ja) * | 1996-08-27 | 1998-03-10 | Seiichi Serizawa | 電子部品 |
| JP2003100952A (ja) * | 2001-09-25 | 2003-04-04 | Kyocera Corp | 配線基板 |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2001068828A (ja) * | 1999-08-27 | 2001-03-16 | Ngk Spark Plug Co Ltd | 配線基板及びその製造方法 |
| JP3765565B2 (ja) * | 2001-05-01 | 2006-04-12 | アルプス電気株式会社 | 電子回路基板 |
-
2003
- 2003-08-06 JP JP2003287962A patent/JP2005057132A/ja active Pending
-
2004
- 2004-07-28 WO PCT/JP2004/010702 patent/WO2005015965A1/fr not_active Ceased
- 2004-08-04 TW TW093123396A patent/TW200511905A/zh unknown
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH06216184A (ja) * | 1992-08-20 | 1994-08-05 | Toyota Autom Loom Works Ltd | 配線基板上の配線の表面処理方法 |
| JPH1068097A (ja) * | 1996-08-27 | 1998-03-10 | Seiichi Serizawa | 電子部品 |
| JP2003100952A (ja) * | 2001-09-25 | 2003-04-04 | Kyocera Corp | 配線基板 |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2005057132A (ja) | 2005-03-03 |
| TW200511905A (en) | 2005-03-16 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| TWI397963B (zh) | 印刷配線基板、其製造方法及電路裝置 | |
| CN101548029B (zh) | 耐热老化特性优良的金属包覆聚酰亚胺树脂基板的制造方法 | |
| JP3615033B2 (ja) | 2層フレキシブル基板の製造方法 | |
| JP3728572B2 (ja) | 配線基板の製造方法 | |
| JP3944027B2 (ja) | フレキシブルプリント配線板の製造方法及びその製造方法で得られたフレキシブルプリント配線板 | |
| JP2006104504A (ja) | ポリイミド樹脂材の無電解めっき前処理方法および表面金属化方法、並びにフレキシブルプリント配線板およびその製造方法 | |
| WO2003095714A1 (fr) | Procede de production de feuille de cuivre electrolytique a revetement de support en feuille thermoresistant a hautes temperatures elevees et feuille de cuivre electrolytique a revetement de support en feuille resistant a hautes temperatures obtenues selon ledit procede | |
| JPS58500765A (ja) | パラジウムと銅およびニツケルの少くとも一方の金属とを含むめつき層を化学的に剥離する方法および該方法に使用する浴 | |
| JP3152331B2 (ja) | フレキシブル基板の製造方法 | |
| TW200934324A (en) | Wiring board, circuit board, and manufacturing thereof | |
| JP2004319918A (ja) | フレキシブルプリント配線板の製造方法及びその製造方法で得られたフレキシブルプリント配線板 | |
| JPH07268640A (ja) | 無電解金めっき方法 | |
| JP3478684B2 (ja) | ガラス回路基板 | |
| KR101681663B1 (ko) | 전도성 패턴 적층체 및 이의 제조방법 | |
| WO2014145743A1 (fr) | Feuille d'aluminium traitée en surface pour circuits électroniques | |
| JP2000178793A (ja) | 金属ポリイミド基板の製造方法 | |
| CN1250772C (zh) | 电镀预处理溶液和电镀预处理方法 | |
| JPH10195668A (ja) | 2層フレキシブル基板の製造方法 | |
| JP3125838B2 (ja) | 2層フレキシブル基板の製造方法 | |
| JP2005057132A (ja) | 回路基板およびそれを含むことを特徴とする製品 | |
| JP2002302778A (ja) | アルミニウム合金の陽極酸化皮膜上への導電部の形成方法 | |
| WO2002098193A1 (fr) | Procede d'application de cuivre epais sur des substrats | |
| JPH06316768A (ja) | フッ素を含有するポリイミド樹脂の無電解めっき方法 | |
| JPH1065316A (ja) | 2層フレキシブル基板の製造方法 | |
| JP3801334B2 (ja) | 半導体素子搭載用基板とその製造方法 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| AK | Designated states |
Kind code of ref document: A1 Designated state(s): AE AG AL AM AT AU AZ BA BB BG BR BW BY BZ CA CH CN CO CR CU CZ DE DK DM DZ EC EE EG ES FI GB GD GE GH GM HR HU ID IL IN IS KE KG KP KR KZ LC LK LR LS LT LU LV MA MD MG MK MN MW MX MZ NA NI NO NZ OM PG PH PL PT RO RU SC SD SE SG SK SL SY TJ TM TN TR TT TZ UA UG US UZ VC VN YU ZA ZM ZW |
|
| AL | Designated countries for regional patents |
Kind code of ref document: A1 Designated state(s): BW GH GM KE LS MW MZ NA SD SL SZ TZ UG ZM ZW AM AZ BY KG KZ MD RU TJ TM AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IT LU MC NL PL PT RO SE SI SK TR BF BJ CF CG CI CM GA GN GQ GW ML MR NE SN TD TG |
|
| DPEN | Request for preliminary examination filed prior to expiration of 19th month from priority date (pct application filed from 20040101) | ||
| 121 | Ep: the epo has been informed by wipo that ep was designated in this application | ||
| 122 | Ep: pct application non-entry in european phase |