ATE196580T1 - Anordnung zum einfügen von stopfbits in regelmässigen abständen in einer digitalen impulsfolge - Google Patents

Anordnung zum einfügen von stopfbits in regelmässigen abständen in einer digitalen impulsfolge

Info

Publication number
ATE196580T1
ATE196580T1 AT94402338T AT94402338T ATE196580T1 AT E196580 T1 ATE196580 T1 AT E196580T1 AT 94402338 T AT94402338 T AT 94402338T AT 94402338 T AT94402338 T AT 94402338T AT E196580 T1 ATE196580 T1 AT E196580T1
Authority
AT
Austria
Prior art keywords
buffer memory
link
regular intervals
arrangement
pulse sequence
Prior art date
Application number
AT94402338T
Other languages
English (en)
Inventor
Jean-Paul Etienne
Original Assignee
Cit Alcatel
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Cit Alcatel filed Critical Cit Alcatel
Application granted granted Critical
Publication of ATE196580T1 publication Critical patent/ATE196580T1/de

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/07—Synchronising arrangements using pulse stuffing for systems with different or fluctuating information rates or bit rates
    • H04J3/076—Bit and byte stuffing, e.g. SDH/PDH desynchronisers, bit-leaking

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Analogue/Digital Conversion (AREA)
  • Control Of Stepping Motors (AREA)
  • Train Traffic Observation, Control, And Security (AREA)
AT94402338T 1993-10-20 1994-10-18 Anordnung zum einfügen von stopfbits in regelmässigen abständen in einer digitalen impulsfolge ATE196580T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR9312497A FR2711435B1 (fr) 1993-10-20 1993-10-20 Dispositif pour justifier à intervalles réguliers un train numérique.

Publications (1)

Publication Number Publication Date
ATE196580T1 true ATE196580T1 (de) 2000-10-15

Family

ID=9452032

Family Applications (1)

Application Number Title Priority Date Filing Date
AT94402338T ATE196580T1 (de) 1993-10-20 1994-10-18 Anordnung zum einfügen von stopfbits in regelmässigen abständen in einer digitalen impulsfolge

Country Status (7)

Country Link
US (1) US5621775A (de)
EP (1) EP0650273B1 (de)
AT (1) ATE196580T1 (de)
AU (1) AU683490B2 (de)
DE (1) DE69425938T2 (de)
ES (1) ES2150972T3 (de)
FR (1) FR2711435B1 (de)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5822383A (en) * 1995-12-15 1998-10-13 Cisco Technology, Inc. System and method for maintaining network synchronization utilizing digital phase comparison techniques with synchronous residual time stamps
US5761203A (en) * 1996-04-04 1998-06-02 Lucent Technologies Inc. Synchronous and asynchronous recovery of signals in an ATM network
US6064706A (en) * 1996-05-01 2000-05-16 Alcatel Usa, Inc. Apparatus and method of desynchronizing synchronously mapped asynchronous data
DE19730716A1 (de) * 1996-10-21 1998-04-23 Fraunhofer Ges Forschung Triggerung eines Meßverfahrens zur Qualitätsbeurteilung von Audio- und/oder Sprachsignalen
US6636518B1 (en) * 1996-12-16 2003-10-21 Juniper Networks Synchronizing source-synchronous links in a switching device
US6269136B1 (en) * 1998-02-02 2001-07-31 Microunity Systems Engineering, Inc. Digital differential analyzer data synchronizer
EP0993644A2 (de) * 1998-04-30 2000-04-19 Koninklijke Philips Electronics N.V. Transkodieren eines datenstroms
FI982040A7 (fi) * 1998-09-22 2000-03-23 Nokia Multimedia Network Terminals Oy Menetelmä ja laite datavirran synkronoimiseksi
US6229863B1 (en) 1998-11-02 2001-05-08 Adc Telecommunications, Inc. Reducing waiting time jitter
US6980569B1 (en) 1999-10-18 2005-12-27 Siemens Communications, Inc. Apparatus and method for optimizing packet length in ToL networks
US6747999B1 (en) 1999-11-15 2004-06-08 Siemens Information And Communication Networks, Inc. Jitter buffer adjustment algorithm
US6683889B1 (en) 1999-11-15 2004-01-27 Siemens Information & Communication Networks, Inc. Apparatus and method for adaptive jitter buffers
GB9930849D0 (en) * 1999-12-24 2000-02-16 Koninkl Philips Electronics Nv Data communications
KR100861884B1 (ko) * 2000-06-20 2008-10-09 코닌클리케 필립스 일렉트로닉스 엔.브이. 정현파 코딩 방법 및 장치
US7143157B2 (en) * 2002-03-25 2006-11-28 Hewlett-Packard Development Company, L.P. Managing the network impact of a digital transmitter
US7984209B1 (en) * 2006-12-12 2011-07-19 Altera Corporation Data interface methods and circuitry with reduced latency
US8681917B2 (en) 2010-03-31 2014-03-25 Andrew Llc Synchronous transfer of streaming data in a distributed antenna system

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4791652A (en) * 1987-06-04 1988-12-13 Northern Telecom Limited Synchronization of asynchronous data signals
US5331641A (en) * 1990-07-27 1994-07-19 Transwitch Corp. Methods and apparatus for retiming and realignment of STS-1 signals into STS-3 type signal
DE4101270A1 (de) * 1991-01-17 1992-07-23 Siemens Ag Verfahren zur uebertragung von digitalsignalen
JPH05183530A (ja) * 1991-06-06 1993-07-23 Fujitsu Ltd 同期ペイロードポインタ処理方式

Also Published As

Publication number Publication date
FR2711435B1 (fr) 1995-12-29
AU7570994A (en) 1995-05-11
ES2150972T3 (es) 2000-12-16
AU683490B2 (en) 1997-11-13
US5621775A (en) 1997-04-15
EP0650273A1 (de) 1995-04-26
EP0650273B1 (de) 2000-09-20
FR2711435A1 (fr) 1995-04-28
DE69425938D1 (de) 2000-10-26
DE69425938T2 (de) 2001-05-03

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