ATE390637T1 - Verfahren und vorrichtung zum prüfen integrierter schaltungen - Google Patents

Verfahren und vorrichtung zum prüfen integrierter schaltungen

Info

Publication number
ATE390637T1
ATE390637T1 AT04711445T AT04711445T ATE390637T1 AT E390637 T1 ATE390637 T1 AT E390637T1 AT 04711445 T AT04711445 T AT 04711445T AT 04711445 T AT04711445 T AT 04711445T AT E390637 T1 ATE390637 T1 AT E390637T1
Authority
AT
Austria
Prior art keywords
test
test system
integrated circuits
program development
testing integrated
Prior art date
Application number
AT04711445T
Other languages
English (en)
Inventor
Ankan Pramanick
Mark Elston
Leon Chen
Robert Sauer
Original Assignee
Advantest Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advantest Corp filed Critical Advantest Corp
Application granted granted Critical
Publication of ATE390637T1 publication Critical patent/ATE390637T1/de

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/3181Functional testing
    • G01R31/3183Generation of test inputs, e.g. test vectors, patterns or sequences
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/3181Functional testing
    • G01R31/3183Generation of test inputs, e.g. test vectors, patterns or sequences
    • G01R31/318307Generation of test inputs, e.g. test vectors, patterns or sequences computer-aided, e.g. automatic test program generator [ATPG], program translations, test program debugging
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/3181Functional testing
    • G01R31/3183Generation of test inputs, e.g. test vectors, patterns or sequences
    • G01R31/318342Generation of test inputs, e.g. test vectors, patterns or sequences by preliminary fault modelling, e.g. analysis, simulation
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/3181Functional testing
    • G01R31/319Tester hardware, i.e. output processing circuits
    • G01R31/31903Tester hardware, i.e. output processing circuits tester configuration
    • G01R31/31907Modular tester, e.g. controlling and coordinating instruments in a bus based architecture

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
AT04711445T 2003-02-14 2004-02-16 Verfahren und vorrichtung zum prüfen integrierter schaltungen ATE390637T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US44783903P 2003-02-14 2003-02-14
US44962203P 2003-02-24 2003-02-24

Publications (1)

Publication Number Publication Date
ATE390637T1 true ATE390637T1 (de) 2008-04-15

Family

ID=39265262

Family Applications (1)

Application Number Title Priority Date Filing Date
AT04711445T ATE390637T1 (de) 2003-02-14 2004-02-16 Verfahren und vorrichtung zum prüfen integrierter schaltungen

Country Status (3)

Country Link
US (6) US20040225459A1 (de)
AT (1) ATE390637T1 (de)
DE (1) DE602004012714T2 (de)

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US20100192135A1 (en) 2010-07-29
US20050039079A1 (en) 2005-02-17
DE602004012714T2 (de) 2009-04-16
US20040225459A1 (en) 2004-11-11
US20080016396A1 (en) 2008-01-17
US8255198B2 (en) 2012-08-28
US20080010524A1 (en) 2008-01-10
US20040225465A1 (en) 2004-11-11

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