ATE457525T1 - Verfahren zur herstellung selbstausgerichteter schottky-dioden für halbleiterbauelemente - Google Patents

Verfahren zur herstellung selbstausgerichteter schottky-dioden für halbleiterbauelemente

Info

Publication number
ATE457525T1
ATE457525T1 AT06831945T AT06831945T ATE457525T1 AT E457525 T1 ATE457525 T1 AT E457525T1 AT 06831945 T AT06831945 T AT 06831945T AT 06831945 T AT06831945 T AT 06831945T AT E457525 T1 ATE457525 T1 AT E457525T1
Authority
AT
Austria
Prior art keywords
junction
aligned
self
semiconductor components
schottky diodes
Prior art date
Application number
AT06831945T
Other languages
English (en)
Inventor
Markus Muller
Original Assignee
Nxp Bv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nxp Bv filed Critical Nxp Bv
Application granted granted Critical
Publication of ATE457525T1 publication Critical patent/ATE457525T1/de

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/01—Manufacture or treatment
    • H10D62/021—Forming source or drain recesses by etching e.g. recessing by etching and then refilling
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0223—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate
    • H10D30/0225—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate using an initial gate mask complementary to the prospective gate location, e.g. using dummy source and drain electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/027—Manufacture or treatment of FETs having insulated gates [IGFET] of lateral single-gate IGFETs
    • H10D30/0277—Manufacture or treatment of FETs having insulated gates [IGFET] of lateral single-gate IGFETs forming conductor-insulator-semiconductor or Schottky barrier source or drain regions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/64—Electrodes comprising a Schottky barrier to a semiconductor
    • H10D64/647—Schottky drain or source electrodes for IGFETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/017—Manufacture or treatment using dummy gates in processes wherein at least parts of the final gates are self-aligned to the dummy gates, i.e. replacement gate processes

Landscapes

  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Light Receiving Elements (AREA)
AT06831945T 2005-11-28 2006-11-27 Verfahren zur herstellung selbstausgerichteter schottky-dioden für halbleiterbauelemente ATE457525T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP05300971 2005-11-28
PCT/IB2006/054446 WO2007060641A1 (en) 2005-11-28 2006-11-27 Method of fabricating self aligned schottky junctions for semiconductors devices

Publications (1)

Publication Number Publication Date
ATE457525T1 true ATE457525T1 (de) 2010-02-15

Family

ID=37865896

Family Applications (1)

Application Number Title Priority Date Filing Date
AT06831945T ATE457525T1 (de) 2005-11-28 2006-11-27 Verfahren zur herstellung selbstausgerichteter schottky-dioden für halbleiterbauelemente

Country Status (7)

Country Link
US (1) US7884002B2 (de)
EP (1) EP1958244B1 (de)
JP (1) JP5001295B2 (de)
CN (1) CN101317253B (de)
AT (1) ATE457525T1 (de)
DE (1) DE602006012215D1 (de)
WO (1) WO2007060641A1 (de)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2931294B1 (fr) * 2008-05-13 2010-09-03 Commissariat Energie Atomique Procede de realisation d'un transistor a source et drain metalliques
US7989824B2 (en) * 2009-06-03 2011-08-02 Koninklijke Philips Electronics N.V. Method of forming a dielectric layer on a semiconductor light emitting device
FR2947384B1 (fr) * 2009-06-25 2012-03-30 Commissariat Energie Atomique Procede de realisation d'un transistor a source et drain metalliques
FR2976122A1 (fr) * 2011-05-31 2012-12-07 St Microelectronics Crolles 2 Transistor mosfet, composant incluant plusieurs tels transistors et procede de fabrication
KR101873911B1 (ko) 2011-06-07 2018-07-04 삼성전자주식회사 콘택 구조체를 포함하는 반도체 소자와 그 제조방법, 및 그것을 포함하는 전자 시스템
EP3417760A1 (de) * 2012-10-23 2018-12-26 Olympus Corporation Halbleiterbauelement und verfahren zur herstellung eines halbleiterbauelements
CN103745929A (zh) * 2013-12-24 2014-04-23 上海新傲科技股份有限公司 肖特基势垒mosfet的制备方法
CN106062962A (zh) * 2014-03-21 2016-10-26 英特尔公司 用于集成富Ge的p‑MOS源极/漏极接触部的技术
DE102016119799B4 (de) 2016-10-18 2020-08-06 Infineon Technologies Ag Integrierte schaltung, die einen vergrabenen hohlraum enthält, und herstellungsverfahren
CN112864116B (zh) * 2019-11-27 2024-06-04 华邦电子股份有限公司 半导体元件及其制造方法
CN112018076A (zh) * 2020-07-28 2020-12-01 中国科学院微电子研究所 一种半导体结构及其制备方法

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0763095B2 (ja) * 1986-04-09 1995-07-05 株式会社東芝 半導体装置
JPH02188967A (ja) * 1989-01-18 1990-07-25 Nissan Motor Co Ltd 半導体装置
JP3444931B2 (ja) * 1993-08-25 2003-09-08 株式会社日立製作所 半導体装置及びその製造方法
JPH0974188A (ja) * 1995-09-05 1997-03-18 Mitsubishi Electric Corp 半導体装置及びその製造方法
JPH09312391A (ja) * 1996-05-22 1997-12-02 Toshiba Corp 半導体装置およびその製造方法
JPH10233451A (ja) * 1997-02-21 1998-09-02 Fujitsu Ltd 半導体装置の製造方法
TW439102B (en) * 1998-12-02 2001-06-07 Nippon Electric Co Field effect transistor and method of manufacturing the same
US6479843B2 (en) * 2000-04-27 2002-11-12 Motorola, Inc. Single supply HFET with temperature compensation
JP3833903B2 (ja) * 2000-07-11 2006-10-18 株式会社東芝 半導体装置の製造方法
US20020155721A1 (en) * 2001-04-03 2002-10-24 Macronix International Co., Ltd Method of forming shallow trench isolation structure
KR100434697B1 (ko) * 2001-09-05 2004-06-07 주식회사 하이닉스반도체 반도체소자의 제조방법
CN1206711C (zh) * 2002-03-28 2005-06-15 华邦电子股份有限公司 金属－氧化物－半导体晶体管的自对准硅化物的制备方法
DE102004012630A1 (de) 2004-03-16 2005-06-30 Infineon Technologies Ag Feldeffekttransistor mit geringem Leckstrom und Verfahren zu seiner Herstellung
JP3910971B2 (ja) 2004-03-26 2007-04-25 株式会社東芝 電界効果トランジスタ
JP2006054423A (ja) * 2004-07-13 2006-02-23 Toshiba Corp 半導体装置及びその製造方法
US20060252191A1 (en) * 2005-05-03 2006-11-09 Advanced Micro Devices, Inc. Methodology for deposition of doped SEG for raised source/drain regions

Also Published As

Publication number Publication date
EP1958244B1 (de) 2010-02-10
EP1958244A1 (de) 2008-08-20
WO2007060641A1 (en) 2007-05-31
US20080299715A1 (en) 2008-12-04
JP5001295B2 (ja) 2012-08-15
CN101317253A (zh) 2008-12-03
DE602006012215D1 (de) 2010-03-25
US7884002B2 (en) 2011-02-08
JP2009517860A (ja) 2009-04-30
CN101317253B (zh) 2010-10-27

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Legal Events

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