ATE51319T1 - Verfahren zur herstellung von einem polysiliciumswiderstand mit niedriger thermischer aktivierungsenergie. - Google Patents
Verfahren zur herstellung von einem polysiliciumswiderstand mit niedriger thermischer aktivierungsenergie.Info
- Publication number
- ATE51319T1 ATE51319T1 AT85303396T AT85303396T ATE51319T1 AT E51319 T1 ATE51319 T1 AT E51319T1 AT 85303396 T AT85303396 T AT 85303396T AT 85303396 T AT85303396 T AT 85303396T AT E51319 T1 ATE51319 T1 AT E51319T1
- Authority
- AT
- Austria
- Prior art keywords
- activation energy
- resistor
- ambient temperature
- making
- polysilicon
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
- H10P95/90—Thermal treatments, e.g. annealing or sintering
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D1/00—Resistors, capacitors or inductors
- H10D1/40—Resistors
- H10D1/47—Resistors having no potential barriers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/40—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials
- H10P14/416—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials of highly doped semiconductor materials, e.g. polysilicon layers or amorphous silicon layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P32/00—Diffusion of dopants within, into or out of wafers, substrates or parts of devices
- H10P32/30—Diffusion for doping of conductive or resistive layers
- H10P32/302—Doping polycrystalline silicon or amorphous silicon layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P34/00—Irradiation with electromagnetic or particle radiation of wafers, substrates or parts of devices
- H10P34/40—Irradiation with electromagnetic or particle radiation of wafers, substrates or parts of devices with high-energy radiation
- H10P34/42—Irradiation with electromagnetic or particle radiation of wafers, substrates or parts of devices with high-energy radiation with electromagnetic radiation, e.g. laser annealing
- H10P34/422—Irradiation with electromagnetic or particle radiation of wafers, substrates or parts of devices with high-energy radiation with electromagnetic radiation, e.g. laser annealing using incoherent radiation
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B10/00—Static random access memory [SRAM] devices
- H10B10/15—Static random access memory [SRAM] devices comprising a resistor load element
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S257/00—Active solid-state devices, e.g. transistors, solid-state diodes
- Y10S257/903—FET configuration adapted for use as static memory cell
- Y10S257/904—FET configuration adapted for use as static memory cell with passive components,, e.g. polysilicon resistors
Landscapes
- Semiconductor Integrated Circuits (AREA)
- Semiconductor Memories (AREA)
- Silicon Polymers (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US06/615,166 US4560419A (en) | 1984-05-30 | 1984-05-30 | Method of making polysilicon resistors with a low thermal activation energy |
| EP85303396A EP0167249B1 (de) | 1984-05-30 | 1985-05-14 | Verfahren zur Herstellung von einem Polysiliciumswiderstand mit niedriger thermischer Aktivierungsenergie |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| ATE51319T1 true ATE51319T1 (de) | 1990-04-15 |
Family
ID=24464276
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| AT85303396T ATE51319T1 (de) | 1984-05-30 | 1985-05-14 | Verfahren zur herstellung von einem polysiliciumswiderstand mit niedriger thermischer aktivierungsenergie. |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US4560419A (de) |
| EP (1) | EP0167249B1 (de) |
| JP (1) | JPS60262453A (de) |
| KR (1) | KR940001890B1 (de) |
| AT (1) | ATE51319T1 (de) |
| CA (1) | CA1213680A (de) |
| DE (1) | DE3576762D1 (de) |
Families Citing this family (21)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4616404A (en) * | 1984-11-30 | 1986-10-14 | Advanced Micro Devices, Inc. | Method of making improved lateral polysilicon diode by treating plasma etched sidewalls to remove defects |
| US4637836A (en) * | 1985-09-23 | 1987-01-20 | Rca Corporation | Profile control of boron implant |
| JPH07101677B2 (ja) * | 1985-12-02 | 1995-11-01 | 株式会社東芝 | 半導体装置の製造方法 |
| US4745079A (en) * | 1987-03-30 | 1988-05-17 | Motorola, Inc. | Method for fabricating MOS transistors having gates with different work functions |
| GB8710359D0 (en) * | 1987-05-01 | 1987-06-03 | Inmos Ltd | Semiconductor element |
| US5248623A (en) * | 1988-02-19 | 1993-09-28 | Nippondenso Co., Ltd. | Method for making a polycrystalline diode having high breakdown |
| JPH02185069A (ja) * | 1988-12-02 | 1990-07-19 | Motorola Inc | 高エネルギー阻止能力及び温度補償された阻止電圧を具備する半導体デバイス |
| US5126279A (en) * | 1988-12-19 | 1992-06-30 | Micron Technology, Inc. | Single polysilicon cross-coupled resistor, six-transistor SRAM cell design technique |
| US5196233A (en) * | 1989-01-18 | 1993-03-23 | Sgs-Thomson Microelectronics, Inc. | Method for fabricating semiconductor circuits |
| US5065362A (en) * | 1989-06-02 | 1991-11-12 | Simtek Corporation | Non-volatile ram with integrated compact static ram load configuration |
| US5151387A (en) | 1990-04-30 | 1992-09-29 | Sgs-Thomson Microelectronics, Inc. | Polycrystalline silicon contact structure |
| US5141597A (en) * | 1990-11-14 | 1992-08-25 | United Technologies Corporation | Thin polysilicon resistors |
| US5581159A (en) * | 1992-04-07 | 1996-12-03 | Micron Technology, Inc. | Back-to-back diode current regulator for field emission display |
| JP2934738B2 (ja) * | 1994-03-18 | 1999-08-16 | セイコーインスツルメンツ株式会社 | 半導体装置およびその製造方法 |
| US5847515A (en) * | 1996-11-01 | 1998-12-08 | Micron Technology, Inc. | Field emission display having multiple brightness display modes |
| US6140684A (en) * | 1997-06-24 | 2000-10-31 | Stmicroelectronic, Inc. | SRAM cell structure with dielectric sidewall spacers and drain and channel regions defined along sidewall spacers |
| US6455392B2 (en) | 2000-01-21 | 2002-09-24 | Bae Systems Information And Electrical Systems Integration, Inc. | Integrated resistor having aligned body and contact and method for forming the same |
| US8072834B2 (en) * | 2005-08-25 | 2011-12-06 | Cypress Semiconductor Corporation | Line driver circuit and method with standby mode of operation |
| US7881118B2 (en) * | 2007-05-25 | 2011-02-01 | Cypress Semiconductor Corporation | Sense transistor protection for memory programming |
| US8059458B2 (en) * | 2007-12-31 | 2011-11-15 | Cypress Semiconductor Corporation | 3T high density nvDRAM cell |
| US8064255B2 (en) * | 2007-12-31 | 2011-11-22 | Cypress Semiconductor Corporation | Architecture of a nvDRAM array and its sense regime |
Family Cites Families (19)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CH581904A5 (de) * | 1974-08-29 | 1976-11-15 | Centre Electron Horloger | |
| US3943545A (en) * | 1975-05-22 | 1976-03-09 | Fairchild Camera And Instrument Corporation | Low interelectrode leakage structure for charge-coupled devices |
| JPS5810863B2 (ja) * | 1978-04-24 | 1983-02-28 | 株式会社日立製作所 | 半導体装置 |
| US4309224A (en) * | 1978-10-06 | 1982-01-05 | Tokyo Shibaura Denki Kabushiki Kaisha | Method for manufacturing a semiconductor device |
| US4214918A (en) * | 1978-10-12 | 1980-07-29 | Stanford University | Method of forming polycrystalline semiconductor interconnections, resistors and contacts by applying radiation beam |
| US4290185A (en) * | 1978-11-03 | 1981-09-22 | Mostek Corporation | Method of making an extremely low current load device for integrated circuit |
| JPS5688818A (en) * | 1979-12-17 | 1981-07-18 | Hitachi Ltd | Polycrystalline silicon membrane and its production |
| JPS5687354A (en) * | 1979-12-17 | 1981-07-15 | Matsushita Electric Ind Co Ltd | Formation of resistor body |
| US4331485A (en) * | 1980-03-03 | 1982-05-25 | Arnon Gat | Method for heat treating semiconductor material using high intensity CW lamps |
| US4381201A (en) * | 1980-03-11 | 1983-04-26 | Fujitsu Limited | Method for production of semiconductor devices |
| US4409724A (en) * | 1980-11-03 | 1983-10-18 | Texas Instruments Incorporated | Method of fabricating display with semiconductor circuits on monolithic structure and flat panel display produced thereby |
| JPS57133661A (en) * | 1981-02-10 | 1982-08-18 | Matsushita Electric Ind Co Ltd | Heat treatment for polycrystalline semiconductor |
| JPS57133660A (en) * | 1981-02-10 | 1982-08-18 | Matsushita Electric Ind Co Ltd | Controlling method for resistance value of polycrystalline semiconductor |
| US4467518A (en) * | 1981-05-19 | 1984-08-28 | Ibm Corporation | Process for fabrication of stacked, complementary MOS field effect transistor circuits |
| JPS5880852A (ja) * | 1981-11-10 | 1983-05-16 | Toshiba Corp | 半導体装置の製造方法 |
| US4467519A (en) * | 1982-04-01 | 1984-08-28 | International Business Machines Corporation | Process for fabricating polycrystalline silicon film resistors |
| JPS5946057A (ja) * | 1982-09-08 | 1984-03-15 | Nec Corp | 半導体装置の製造方法 |
| US4658378A (en) * | 1982-12-15 | 1987-04-14 | Inmos Corporation | Polysilicon resistor with low thermal activation energy |
| US4489104A (en) * | 1983-06-03 | 1984-12-18 | Industrial Technology Research Institute | Polycrystalline silicon resistor having limited lateral diffusion |
-
1984
- 1984-05-30 US US06/615,166 patent/US4560419A/en not_active Expired - Lifetime
- 1984-09-18 CA CA000463510A patent/CA1213680A/en not_active Expired
-
1985
- 1985-05-14 DE DE8585303396T patent/DE3576762D1/de not_active Expired - Lifetime
- 1985-05-14 AT AT85303396T patent/ATE51319T1/de not_active IP Right Cessation
- 1985-05-14 EP EP85303396A patent/EP0167249B1/de not_active Expired - Lifetime
- 1985-05-29 JP JP60116298A patent/JPS60262453A/ja active Pending
- 1985-05-29 KR KR1019850003707A patent/KR940001890B1/ko not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| EP0167249A3 (en) | 1986-03-12 |
| DE3576762D1 (de) | 1990-04-26 |
| KR850008759A (ko) | 1985-12-21 |
| US4560419A (en) | 1985-12-24 |
| JPS60262453A (ja) | 1985-12-25 |
| CA1213680A (en) | 1986-11-04 |
| EP0167249A2 (de) | 1986-01-08 |
| EP0167249B1 (de) | 1990-03-21 |
| KR940001890B1 (ko) | 1994-03-10 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| UEP | Publication of translation of european patent specification | ||
| REN | Ceased due to non-payment of the annual fee |