ATE518229T1 - Verfahren zur programmierung eines nichtflüchtigen mehrzustandsspeichers unter verwendung einer intelligenten verifizierung - Google Patents

Verfahren zur programmierung eines nichtflüchtigen mehrzustandsspeichers unter verwendung einer intelligenten verifizierung

Info

Publication number
ATE518229T1
ATE518229T1 AT06826985T AT06826985T ATE518229T1 AT E518229 T1 ATE518229 T1 AT E518229T1 AT 06826985 T AT06826985 T AT 06826985T AT 06826985 T AT06826985 T AT 06826985T AT E518229 T1 ATE518229 T1 AT E518229T1
Authority
AT
Austria
Prior art keywords
sub
distribution
storage elements
volatile storage
programmed
Prior art date
Application number
AT06826985T
Other languages
English (en)
Inventor
Yan Li
Long Pham
Original Assignee
Sandisk Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US11/260,658 external-priority patent/US7301817B2/en
Priority claimed from US11/259,799 external-priority patent/US7366022B2/en
Application filed by Sandisk Corp filed Critical Sandisk Corp
Application granted granted Critical
Publication of ATE518229T1 publication Critical patent/ATE518229T1/de

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G11C11/5628—Programming or writing circuits; Data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/12—Programming voltage switching circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3436—Arrangements for verifying correct programming or erasure

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Read Only Memory (AREA)
AT06826985T 2005-10-27 2006-10-26 Verfahren zur programmierung eines nichtflüchtigen mehrzustandsspeichers unter verwendung einer intelligenten verifizierung ATE518229T1 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US11/260,658 US7301817B2 (en) 2005-10-27 2005-10-27 Method for programming of multi-state non-volatile memory using smart verify
US11/259,799 US7366022B2 (en) 2005-10-27 2005-10-27 Apparatus for programming of multi-state non-volatile memory using smart verify
PCT/US2006/042179 WO2007050976A1 (en) 2005-10-27 2006-10-26 Method for programming of multi-state non-volatile memory using smart verify

Publications (1)

Publication Number Publication Date
ATE518229T1 true ATE518229T1 (de) 2011-08-15

Family

ID=37806696

Family Applications (1)

Application Number Title Priority Date Filing Date
AT06826985T ATE518229T1 (de) 2005-10-27 2006-10-26 Verfahren zur programmierung eines nichtflüchtigen mehrzustandsspeichers unter verwendung einer intelligenten verifizierung

Country Status (6)

Country Link
EP (1) EP1946323B1 (de)
JP (1) JP4855474B2 (de)
KR (1) KR101314306B1 (de)
AT (1) ATE518229T1 (de)
TW (1) TWI311762B (de)
WO (1) WO2007050976A1 (de)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7813188B2 (en) * 2007-09-10 2010-10-12 Hynix Semiconductor Inc. Non-volatile memory device and a method of programming a multi level cell in the same
US7768836B2 (en) * 2008-10-10 2010-08-03 Sandisk Corporation Nonvolatile memory and method with reduced program verify by ignoring fastest and/or slowest programming bits
KR100996108B1 (ko) 2009-01-21 2010-11-22 주식회사 하이닉스반도체 불휘발성 메모리 장치의 프로그램 방법
KR101012982B1 (ko) 2009-06-30 2011-02-10 주식회사 하이닉스반도체 불휘발성 메모리 소자의 동작 방법
US8223556B2 (en) * 2009-11-25 2012-07-17 Sandisk Technologies Inc. Programming non-volatile memory with a reduced number of verify operations
JP2011150749A (ja) * 2010-01-20 2011-08-04 Toshiba Corp 不揮発性半導体記憶装置
KR101676816B1 (ko) * 2010-02-11 2016-11-18 삼성전자주식회사 플래시 메모리 장치 및 그것의 프로그램 방법
US8345482B2 (en) * 2010-12-15 2013-01-01 Micron Technology, Inc. Methods for segmented programming and memory devices
US9564226B1 (en) 2015-10-30 2017-02-07 Sandisk Technologies Llc Smart verify for programming non-volatile memory
TWI604449B (zh) * 2016-08-31 2017-11-01 旺宏電子股份有限公司 記憶體裝置與其程式化方法
US11532354B2 (en) 2020-03-22 2022-12-20 Silicon Storage Technology, Inc. Precision tuning of a page or word of non-volatile memory cells and associated high voltage circuits for an analog neural memory array in an artificial neural network
KR20220120033A (ko) 2021-02-22 2022-08-30 에스케이하이닉스 주식회사 메모리 장치 및 그 동작 방법
US12205657B2 (en) 2022-08-25 2025-01-21 Sandisk Technologies Llc Hybrid smart verify for QLC/TLC die

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3730272B2 (ja) 1994-09-17 2005-12-21 株式会社東芝 不揮発性半導体記憶装置
KR100253868B1 (ko) * 1995-11-13 2000-05-01 니시무로 타이죠 불휘발성 반도체기억장치
US5867429A (en) 1997-11-19 1999-02-02 Sandisk Corporation High density non-volatile flash memory without adverse effects of electric field coupling between adjacent floating gates
US6538923B1 (en) * 2001-02-26 2003-03-25 Advanced Micro Devices, Inc. Staircase program verify for multi-level cell flash memory designs
US6522580B2 (en) * 2001-06-27 2003-02-18 Sandisk Corporation Operating techniques for reducing effects of coupling between storage elements of a non-volatile memory operated in multiple data states
JP3935139B2 (ja) * 2002-11-29 2007-06-20 株式会社東芝 半導体記憶装置
US7073103B2 (en) * 2002-12-05 2006-07-04 Sandisk Corporation Smart verify for multi-state memories
US7002843B2 (en) * 2004-01-27 2006-02-21 Sandisk Corporation Variable current sinking for coarse/fine programming of non-volatile memory

Also Published As

Publication number Publication date
TWI311762B (en) 2009-07-01
JP2009514138A (ja) 2009-04-02
JP4855474B2 (ja) 2012-01-18
EP1946323A1 (de) 2008-07-23
EP1946323B1 (de) 2011-07-27
TW200733114A (en) 2007-09-01
WO2007050976A1 (en) 2007-05-03
KR101314306B1 (ko) 2013-10-02
KR20080089335A (ko) 2008-10-06

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