ATE525744T1 - Verfahren zur herstellung von schichtgebundenem gruppe iii-nitridhalbleitersubstrat - Google Patents

Verfahren zur herstellung von schichtgebundenem gruppe iii-nitridhalbleitersubstrat

Info

Publication number
ATE525744T1
ATE525744T1 AT09166067T AT09166067T ATE525744T1 AT E525744 T1 ATE525744 T1 AT E525744T1 AT 09166067 T AT09166067 T AT 09166067T AT 09166067 T AT09166067 T AT 09166067T AT E525744 T1 ATE525744 T1 AT E525744T1
Authority
AT
Austria
Prior art keywords
nitride semiconductor
group iii
iii nitride
semiconductor layer
semiconductor substrate
Prior art date
Application number
AT09166067T
Other languages
English (en)
Inventor
Akihiro Hachigo
Original Assignee
Sumitomo Electric Industries
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumitomo Electric Industries filed Critical Sumitomo Electric Industries
Application granted granted Critical
Publication of ATE525744T1 publication Critical patent/ATE525744T1/de

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P10/00—Bonding of wafers, substrates or parts of devices
    • H10P10/12—Bonding of semiconductor wafers or semiconductor substrates to semiconductor wafers or semiconductor substrates
    • H10P10/128—Bonding of semiconductor wafers or semiconductor substrates to semiconductor wafers or semiconductor substrates by direct semiconductor to semiconductor bonding

Landscapes

  • Recrystallisation Techniques (AREA)
  • Led Devices (AREA)
  • Semiconductor Lasers (AREA)
AT09166067T 2008-08-11 2009-07-22 Verfahren zur herstellung von schichtgebundenem gruppe iii-nitridhalbleitersubstrat ATE525744T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2008206933A JP4631946B2 (ja) 2008-08-11 2008-08-11 Ｉｉｉ族窒化物半導体層貼り合わせ基板の製造方法

Publications (1)

Publication Number Publication Date
ATE525744T1 true ATE525744T1 (de) 2011-10-15

Family

ID=41263649

Family Applications (1)

Application Number Title Priority Date Filing Date
AT09166067T ATE525744T1 (de) 2008-08-11 2009-07-22 Verfahren zur herstellung von schichtgebundenem gruppe iii-nitridhalbleitersubstrat

Country Status (7)

Country Link
US (1) US8124498B2 (de)
EP (1) EP2154709B1 (de)
JP (1) JP4631946B2 (de)
KR (1) KR20100019965A (de)
CN (1) CN101651091A (de)
AT (1) ATE525744T1 (de)
TW (1) TW201006974A (de)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9064706B2 (en) * 2006-11-17 2015-06-23 Sumitomo Electric Industries, Ltd. Composite of III-nitride crystal on laterally stacked substrates
JP5544875B2 (ja) * 2009-12-25 2014-07-09 住友電気工業株式会社 複合基板
RU2528604C2 (ru) * 2010-04-08 2014-09-20 Нития Корпорейшн Светоизлучающий прибор и способ его изготовления
WO2011132654A1 (ja) * 2010-04-20 2011-10-27 住友電気工業株式会社 複合基板の製造方法
WO2011152262A1 (ja) 2010-05-31 2011-12-08 日亜化学工業株式会社 発光装置及びその製造方法
CN101962804B (zh) * 2010-10-30 2012-05-02 北京大学 基于外延材料应力控制的GaN厚膜自分离方法
KR20120052160A (ko) 2010-11-15 2012-05-23 엔지케이 인슐레이터 엘티디 복합 기판 및 복합 기판의 제조 방법
CN104641453B (zh) * 2012-10-12 2018-03-30 住友电气工业株式会社 Iii族氮化物复合衬底及其制造方法以及制造iii族氮化物半导体器件的方法
US9281233B2 (en) * 2012-12-28 2016-03-08 Sunedison Semiconductor Limited Method for low temperature layer transfer in the preparation of multilayer semiconductor devices
US9058990B1 (en) * 2013-12-19 2015-06-16 International Business Machines Corporation Controlled spalling of group III nitrides containing an embedded spall releasing plane
CN103696022B (zh) * 2013-12-27 2016-04-13 贵州蓝科睿思技术研发中心 一种离子注入分离蓝宝石的方法
JP6268229B2 (ja) * 2016-06-27 2018-01-24 株式会社サイオクス 窒化物半導体積層物、窒化物半導体積層物の製造方法、半導体積層物の製造方法、および半導体積層物の検査方法
CN113808925A (zh) * 2021-09-28 2021-12-17 包头稀土研发中心 一种复合结构荧光衬底、复合方法及倒装led结构
CN115621403B (zh) * 2022-10-25 2025-09-09 佛山市国星半导体技术有限公司 一种低翘曲度键合片的键合方法

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3658756B2 (ja) * 1999-03-01 2005-06-08 住友電気工業株式会社 化合物半導体の製造方法
PL207400B1 (pl) * 2001-06-06 2010-12-31 Ammono Społka Z Ograniczoną Odpowiedzialnością Sposób i urządzenie do otrzymywania objętościowego monokryształu azotku zawierającego gal
JP2006210660A (ja) * 2005-01-28 2006-08-10 Hitachi Cable Ltd 半導体基板の製造方法
JP5003033B2 (ja) * 2006-06-30 2012-08-15 住友電気工業株式会社 ＧａＮ薄膜貼り合わせ基板およびその製造方法、ならびにＧａＮ系半導体デバイスおよびその製造方法
US7575988B2 (en) * 2006-07-11 2009-08-18 S.O.I.Tec Silicon On Insulator Technologies Method of fabricating a hybrid substrate
JP2008159692A (ja) * 2006-12-21 2008-07-10 Covalent Materials Corp 半導体基板の製造方法

Also Published As

Publication number Publication date
US8124498B2 (en) 2012-02-28
EP2154709B1 (de) 2011-09-21
TW201006974A (en) 2010-02-16
US20100035406A1 (en) 2010-02-11
JP2010045098A (ja) 2010-02-25
JP4631946B2 (ja) 2011-02-16
KR20100019965A (ko) 2010-02-19
CN101651091A (zh) 2010-02-17
EP2154709A3 (de) 2010-09-01
EP2154709A2 (de) 2010-02-17

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