EP2600390A4 - Chip-herstellungsverfahren - Google Patents

Chip-herstellungsverfahren

Info

Publication number
EP2600390A4
EP2600390A4 EP11812308.2A EP11812308A EP2600390A4 EP 2600390 A4 EP2600390 A4 EP 2600390A4 EP 11812308 A EP11812308 A EP 11812308A EP 2600390 A4 EP2600390 A4 EP 2600390A4
Authority
EP
European Patent Office
Prior art keywords
chip
manufacturing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP11812308.2A
Other languages
English (en)
French (fr)
Other versions
EP2600390B1 (de
EP2600390A1 (de
Inventor
Hideki Shimoi
Keisuke Araki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hamamatsu Photonics KK
Original Assignee
Hamamatsu Photonics KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hamamatsu Photonics KK filed Critical Hamamatsu Photonics KK
Publication of EP2600390A1 publication Critical patent/EP2600390A1/de
Publication of EP2600390A4 publication Critical patent/EP2600390A4/de
Application granted granted Critical
Publication of EP2600390B1 publication Critical patent/EP2600390B1/de
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P52/00—Grinding, lapping or polishing of wafers, substrates or parts of devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P54/00—Cutting or separating of wafers, substrates or parts of devices
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K26/00—Working by laser beam, e.g. welding, cutting or boring
    • B23K26/02—Positioning or observing the workpiece, e.g. with respect to the point of impact; Aligning, aiming or focusing the laser beam
    • B23K26/04—Automatically aligning, aiming or focusing the laser beam, e.g. using the back-scattered light
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/22—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials using physical deposition, e.g. vacuum deposition or sputtering
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P52/00—Grinding, lapping or polishing of wafers, substrates or parts of devices
    • H10P52/40—Chemomechanical polishing [CMP]
    • H10P52/402—Chemomechanical polishing [CMP] of semiconductor materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H10P95/11—Separation of active layers from substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H10P95/90—Thermal treatments, e.g. annealing or sintering
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/015—Manufacture or treatment of bond wires

Landscapes

  • Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Engineering & Computer Science (AREA)
  • Plasma & Fusion (AREA)
  • Mechanical Engineering (AREA)
  • Dicing (AREA)
  • Laser Beam Processing (AREA)
EP11812308.2A 2010-07-26 2011-07-19 Chip-herstellungsverfahren Active EP2600390B1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2010167440A JP5653110B2 (ja) 2010-07-26 2010-07-26 チップの製造方法
PCT/JP2011/066344 WO2012014716A1 (ja) 2010-07-26 2011-07-19 チップの製造方法

Publications (3)

Publication Number Publication Date
EP2600390A1 EP2600390A1 (de) 2013-06-05
EP2600390A4 true EP2600390A4 (de) 2016-05-18
EP2600390B1 EP2600390B1 (de) 2019-08-21

Family

ID=45529932

Family Applications (1)

Application Number Title Priority Date Filing Date
EP11812308.2A Active EP2600390B1 (de) 2010-07-26 2011-07-19 Chip-herstellungsverfahren

Country Status (7)

Country Link
US (1) US8802544B2 (de)
EP (1) EP2600390B1 (de)
JP (1) JP5653110B2 (de)
KR (1) KR101914146B1 (de)
CN (1) CN103026468B (de)
TW (1) TWI527101B (de)
WO (1) WO2012014716A1 (de)

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US20120299219A1 (en) * 2011-05-27 2012-11-29 Hamamatsu Photonics K.K. Laser processing method
US20130344684A1 (en) * 2012-06-20 2013-12-26 Stuart Bowden Methods and systems for using subsurface laser engraving (ssle) to create one or more wafers from a material
US9404198B2 (en) * 2012-07-30 2016-08-02 Rayton Solar Inc. Processes and apparatuses for manufacturing wafers
US9499921B2 (en) 2012-07-30 2016-11-22 Rayton Solar Inc. Float zone silicon wafer manufacturing system and related process
US8809166B2 (en) * 2012-12-20 2014-08-19 Nxp B.V. High die strength semiconductor wafer processing method and system
ITAN20130231A1 (it) * 2013-12-05 2015-06-06 Munoz David Callejo Procedimento per ottenere una pluralita' di lamine da un lingotto di materiale con struttura monocristallina
US20150158117A1 (en) * 2013-12-05 2015-06-11 David Callejo Muñoz System and method for obtaining laminae made of a material having known optical transparency characteristics
JP2017071074A (ja) * 2015-10-05 2017-04-13 国立大学法人埼玉大学 内部加工層形成単結晶基板の製造方法、および、単結晶基板の製造方法
JP6341959B2 (ja) 2016-05-27 2018-06-13 浜松ホトニクス株式会社 ファブリペロー干渉フィルタの製造方法
WO2017204326A1 (ja) * 2016-05-27 2017-11-30 浜松ホトニクス株式会社 ファブリペロー干渉フィルタの製造方法
WO2018204206A2 (en) 2017-05-01 2018-11-08 Icu Medical, Inc. Medical fluid connectors and methods for providing additives in medical fluid lines
US11517732B2 (en) 2018-11-07 2022-12-06 Icu Medical, Inc. Syringe with antimicrobial properties
WO2020129733A1 (ja) * 2018-12-21 2020-06-25 東京エレクトロン株式会社 基板処理装置及び基板処理方法
KR102745886B1 (ko) * 2018-12-21 2024-12-23 도쿄엘렉트론가부시키가이샤 기판 처리 장치 및 기판 처리 방법
DE102019201438B4 (de) * 2019-02-05 2024-05-02 Disco Corporation Verfahren zum Herstellen eines Substrats und System zum Herstellen eines Substrats
JP7230650B2 (ja) * 2019-04-05 2023-03-01 Tdk株式会社 無機材料基板の加工方法、デバイス、およびデバイスの製造方法
JP7129558B2 (ja) * 2019-04-19 2022-09-01 東京エレクトロン株式会社 処理装置及び処理方法
JP7427189B2 (ja) * 2020-01-31 2024-02-05 国立大学法人東海国立大学機構 レーザ加工方法、半導体部材製造方法、及び、レーザ加工装置
JP7405365B2 (ja) * 2020-01-31 2023-12-26 国立大学法人東海国立大学機構 レーザ加工方法、半導体部材製造方法、及び、レーザ加工装置
DE102020108247A1 (de) 2020-03-25 2021-09-30 Trumpf Laser- Und Systemtechnik Gmbh Grossvolumiges entfernen von material durch laser-unterstütztes ätzen
JP7604137B2 (ja) 2020-09-04 2024-12-23 株式会社ディスコ ウエーハの加工方法
JP7608019B2 (ja) 2020-11-18 2025-01-06 株式会社ディスコ ウェーハの製造方法及び積層デバイスチップの製造方法
JP7612290B2 (ja) 2020-11-18 2025-01-14 株式会社ディスコ ウェーハの製造方法及び積層デバイスチップの製造方法
JP7608018B2 (ja) * 2020-11-18 2025-01-06 株式会社ディスコ ウェーハの製造方法及び積層デバイスチップの製造方法
JP7716305B2 (ja) * 2021-10-11 2025-07-31 株式会社デンソー 半導体装置の製造方法

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Patent Citations (1)

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Publication number Priority date Publication date Assignee Title
WO2005094320A2 (en) * 2004-03-29 2005-10-13 J.P. Sercel Associates Inc. Method of separating layers of material using a laser beam

Also Published As

Publication number Publication date
US20120135585A1 (en) 2012-05-31
WO2012014716A1 (ja) 2012-02-02
US8802544B2 (en) 2014-08-12
CN103026468A (zh) 2013-04-03
TWI527101B (zh) 2016-03-21
KR20130088746A (ko) 2013-08-08
KR101914146B1 (ko) 2018-11-02
TW201220378A (en) 2012-05-16
EP2600390B1 (de) 2019-08-21
JP5653110B2 (ja) 2015-01-14
JP2012028646A (ja) 2012-02-09
EP2600390A1 (de) 2013-06-05
CN103026468B (zh) 2015-11-25

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