ES8305534A1 - Procedimiento de pasivacion de dispositivos semiconductores. - Google Patents
Procedimiento de pasivacion de dispositivos semiconductores.Info
- Publication number
- ES8305534A1 ES8305534A1 ES514071A ES514071A ES8305534A1 ES 8305534 A1 ES8305534 A1 ES 8305534A1 ES 514071 A ES514071 A ES 514071A ES 514071 A ES514071 A ES 514071A ES 8305534 A1 ES8305534 A1 ES 8305534A1
- Authority
- ES
- Spain
- Prior art keywords
- semiconductor device
- moat
- laser beam
- device passivation
- moved relative
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
- H10D62/103—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
- H10D62/104—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices having particular shapes of the bodies at or near reverse-biased junctions, e.g. having bevels or moats
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P34/00—Irradiation with electromagnetic or particle radiation of wafers, substrates or parts of devices
- H10P34/40—Irradiation with electromagnetic or particle radiation of wafers, substrates or parts of devices with high-energy radiation
- H10P34/42—Irradiation with electromagnetic or particle radiation of wafers, substrates or parts of devices with high-energy radiation with electromagnetic radiation, e.g. laser annealing
Landscapes
- Thyristors (AREA)
- Dicing (AREA)
- Bipolar Transistors (AREA)
Abstract
PROCEDIMIENTO DE PASIVACION DE DISPOSITIVOS SEMICONDUCTORES. SE FORMA UNA RANURA ADYACENTE AL PERIMETRO DE LA REACCION ACTIVA DEL DISPOSITIVO HACIENDO UN CORTE POR MEDIO DE UN RAYO LASER QUE INCIDE EN ANGULO OBLICUO CON RESPECTO A LA SUPERFICIE DE DICHA REGION ACTIVA. SE ENSANCHA LA RANURA MEDIANTE MORDENTADO QUIMICO Y SE RECUBRE CON MATERIAL DIELECTRICO DE PASIVACION EN PELICULA DEPOSITADA A BAJA PRESION. DE APLICACION A PLACAS SEMICONDUCTORAS SOBRE LAS QUE SE FORMAN SIMULTANEAMENTE UNA PLURALIDAD DE DISPOSITIVOS Y EN DISPOSITIVOS DE VOLTAJE ELEVADO.
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| GB8122176 | 1981-07-17 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| ES8305534A1 true ES8305534A1 (es) | 1983-04-01 |
| ES514071A0 ES514071A0 (es) | 1983-04-01 |
Family
ID=10523336
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| ES514071A Granted ES514071A0 (es) | 1981-07-17 | 1982-07-16 | Procedimiento de pasivacion de dispositivos semiconductores. |
Country Status (4)
| Country | Link |
|---|---|
| EP (1) | EP0070692A3 (es) |
| JP (1) | JPS58121673A (es) |
| ES (1) | ES514071A0 (es) |
| GB (1) | GB2102202A (es) |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| AU570309B2 (en) * | 1984-03-26 | 1988-03-10 | Unisearch Limited | Buried contact solar cell |
| FR2579023B1 (fr) * | 1985-03-12 | 1988-06-24 | Silicium Semiconducteur Ssc | Composant semiconducteur a tenue en tension amelioree par sillons peripheriques multiples |
| US4748103A (en) * | 1986-03-21 | 1988-05-31 | Advanced Power Technology | Mask-surrogate semiconductor process employing dopant protective region |
| US4962057A (en) * | 1988-10-13 | 1990-10-09 | Xerox Corporation | Method of in situ photo induced evaporation enhancement of compound thin films during or after epitaxial growth |
| DE4114660C2 (de) * | 1991-05-06 | 1997-09-18 | Telefunken Microelectron | Verfahren zur Herstellung glaspassivierter Halbleiterbauelemente |
| EP1601010A3 (fr) | 2004-05-26 | 2009-01-21 | St Microelectronics S.A. | Formation de tranchées obliques |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3559006A (en) * | 1968-04-11 | 1971-01-26 | Tokyo Shibaura Electric Co | Semiconductor device with an inclined inwardly extending groove |
| US4019248A (en) * | 1974-06-04 | 1977-04-26 | Texas Instruments Incorporated | High voltage junction semiconductor device fabrication |
-
1982
- 1982-07-12 GB GB08220193A patent/GB2102202A/en not_active Withdrawn
- 1982-07-15 EP EP82303718A patent/EP0070692A3/en not_active Withdrawn
- 1982-07-16 ES ES514071A patent/ES514071A0/es active Granted
- 1982-07-16 JP JP57123111A patent/JPS58121673A/ja active Pending
Also Published As
| Publication number | Publication date |
|---|---|
| GB2102202A (en) | 1983-01-26 |
| EP0070692A3 (en) | 1984-11-07 |
| EP0070692A2 (en) | 1983-01-26 |
| ES514071A0 (es) | 1983-04-01 |
| JPS58121673A (ja) | 1983-07-20 |
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