HK167695A - Semiconductor memory - Google Patents

Semiconductor memory Download PDF

Info

Publication number
HK167695A
HK167695A HK167695A HK167695A HK167695A HK 167695 A HK167695 A HK 167695A HK 167695 A HK167695 A HK 167695A HK 167695 A HK167695 A HK 167695A HK 167695 A HK167695 A HK 167695A
Authority
HK
Hong Kong
Prior art keywords
blocks
cell
cell field
fields
semiconductor memory
Prior art date
Application number
HK167695A
Other languages
German (de)
English (en)
Inventor
Christoph Utesch Matthias
Martin Dr.-Ing. Peisl
Original Assignee
Siemens Aktiengesellschaft
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Aktiengesellschaft filed Critical Siemens Aktiengesellschaft
Publication of HK167695A publication Critical patent/HK167695A/xx

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/02—Disposition of storage elements, e.g. in the form of a matrix array
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/408—Address circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4097—Bit-line organisation, e.g. bit-line layout, folded bit lines
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/02—Disposition of storage elements, e.g. in the form of a matrix array
    • G11C5/025—Geometric lay-out considerations of storage- and peripheral-blocks in a semiconductor storage device

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Semiconductor Memories (AREA)
  • Dram (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Static Random-Access Memory (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)

Claims (4)

  1. Mémoire à semiconducteurs comportant une surface rectangulaire de microplaquette (1), dans laquelle
    - la mémoire à semiconducteurs comporte des blocs de décodeurs (2, 3), des blocs de circuits périphériques, des zones de cellules (7) comportant des lignes de transmission de mots et des lignes de transmission de bits, et une surface (4) ne comportant aucune zone de cellules,
    - les zones de cellules (7) sont réunies pour former des blocs rectangulaires (8) de zones de cellules,
    - les blocs de décodeurs (2,3) sont disposés respectivement contre des bords, situés en vis-à-vis, de respectivement deux blocs de cellules de zones de cellules,
    - les blocs de circuits périphériques sont disposés à l'intérieur de la surface (4) ne comportant aucune zone de cellules,
    - des plots de connexion (5) sont prévus pour relier la mémoire à semiconducteurs aux bornes d'un boîtier,
    caractérisée par le fait que
    - les blocs de zones de cellules sont réunis pour former quatre blocs combinés (10) de zones de cellules,
    - les quatre blocs combinés (10) de zones de cellules sont disposés aux angles de la surface de microplaquette (1),
    - la surface (4), qui ne comporte aucune zone de cellules, est disposée entre les blocs de décodeurs opposés (2, 3),
    - les plots de connexion (5) sont disposés à l'intérieur de la surface (4) qui ne comporte aucune zone de cellule.
  2. Mémoire à semiconducteurs suivant la revendication 1, caractérisée par le fait que des étages d'attaque (6), qui amplifient les signaux des lignes de transmission de bits des zones de cellules (7), sont disposés entre les zones de cellules (7).
  3. Mémoire à semiconducteurs suivant la revendication 1, caractérisée par le fait que des étages d'attaque (9), qui amplifient les signaux des lignes de transmission de mots des zones de cellules (7), sont disposés entre les blocs (8) de zones de cellules.
  4. Mémoire à semiconducteurs suivant la revendication 1, caractérisé par le fait que des étages d'attaque (6), qui amplifient les signaux des lignes de transmission de bits des zones de cellules (7), sont disposés entre les blocs (8) des zones de cellules.
HK167695A 1989-11-24 1995-10-26 Semiconductor memory HK167695A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP89121736A EP0428785B1 (fr) 1989-11-24 1989-11-24 Mémoire à semi-conducteurs

Publications (1)

Publication Number Publication Date
HK167695A true HK167695A (en) 1995-11-03

Family

ID=8202158

Family Applications (1)

Application Number Title Priority Date Filing Date
HK167695A HK167695A (en) 1989-11-24 1995-10-26 Semiconductor memory

Country Status (7)

Country Link
US (1) US5109265A (fr)
EP (1) EP0428785B1 (fr)
JP (1) JP2612837B2 (fr)
KR (1) KR100253988B1 (fr)
AT (1) ATE101746T1 (fr)
DE (1) DE58907014D1 (fr)
HK (1) HK167695A (fr)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07111971B2 (ja) * 1989-10-11 1995-11-29 三菱電機株式会社 集積回路装置の製造方法
KR940006164B1 (ko) * 1991-05-11 1994-07-08 금성일렉트론 주식회사 반도체 패키지 및 그 제조방법
JP3299342B2 (ja) * 1993-06-11 2002-07-08 株式会社日立製作所 半導体メモリモジュール
JP3135795B2 (ja) * 1994-09-22 2001-02-19 東芝マイクロエレクトロニクス株式会社 ダイナミック型メモリ
JP3160480B2 (ja) * 1994-11-10 2001-04-25 株式会社東芝 半導体記憶装置
US5659189A (en) * 1995-06-07 1997-08-19 Lsi Logic Corporation Layout configuration for an integrated circuit gate array
KR0164391B1 (ko) * 1995-06-29 1999-02-18 김광호 고속동작을 위한 회로 배치 구조를 가지는 반도체 메모리 장치
KR0172426B1 (ko) * 1995-12-21 1999-03-30 김광호 반도체 메모리장치
KR100311035B1 (ko) * 1997-11-21 2002-02-28 윤종용 효율적으로 배치된 패드들을 갖는 반도체 메모리 장치
US5936877A (en) 1998-02-13 1999-08-10 Micron Technology, Inc. Die architecture accommodating high-speed semiconductor devices
JP2954165B1 (ja) * 1998-05-20 1999-09-27 日本電気アイシーマイコンシステム株式会社 半導体装置
TW457485B (en) * 1998-09-08 2001-10-01 Siemens Ag Integrated semiconductor-memory
DE19952258A1 (de) 1999-10-29 2001-05-10 Infineon Technologies Ag Integrierter Speicher
JP3990125B2 (ja) * 2001-08-29 2007-10-10 株式会社東芝 半導体メモリチップおよび半導体メモリ
KR100488544B1 (ko) 2002-11-11 2005-05-11 삼성전자주식회사 반도체 메모리장치의 블록선택정보를 이용한 뱅크전압제어장치 및 그 제어방법

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS609152A (ja) * 1983-06-29 1985-01-18 Fujitsu Ltd 半導体装置
JPS62192086A (ja) * 1986-02-18 1987-08-22 Matsushita Electronics Corp 半導体記憶装置
US4864381A (en) * 1986-06-23 1989-09-05 Harris Corporation Hierarchical variable die size gate array architecture
JPH02246149A (ja) * 1989-03-20 1990-10-01 Hitachi Ltd 半導体集積回路装置とその欠陥救済法
JP2937363B2 (ja) * 1989-09-29 1999-08-23 株式会社日立製作所 半導体記憶装置

Also Published As

Publication number Publication date
ATE101746T1 (de) 1994-03-15
EP0428785B1 (fr) 1994-02-16
JPH03173173A (ja) 1991-07-26
US5109265A (en) 1992-04-28
EP0428785A1 (fr) 1991-05-29
JP2612837B2 (ja) 1997-05-21
DE58907014D1 (de) 1994-03-24
KR910010500A (ko) 1991-06-29
KR100253988B1 (ko) 2000-04-15

Similar Documents

Publication Publication Date Title
HK167695A (en) Semiconductor memory
EP0096359A2 (fr) Dispositif de mémoire semi-conductrice
US20020062430A1 (en) Memory configuration with a central connection area
US4796224A (en) Layout for stable high speed semiconductor memory device
KR930005030A (ko) 반도체 메모리
KR0135085B1 (ko) 메모리장치
EP0385389B1 (fr) Circuit de mémoire à semi-conducteurs intégré pouvant masquer l'écriture de mémoire
US4590588A (en) Monolithic semiconductor memory
EP0107387A3 (fr) Dispositif de mémoire semi-conductrice
US4402065A (en) Integrated RAM/EAROM memory system
EP0251559A2 (fr) Dispositif de mémoire à semi-conducteurs
KR920010640A (ko) 강유전성 메모리 디바이스 감지 증폭기용 전치 증폭기
EP0144710A3 (fr) Circuit d'application d'une tension à une cellule de mémoire à capacité MOS d'un dispositif de mémoire semi-conductrice
US5801983A (en) Semiconductor memory device having memory cells designed to offset bit line parasitic capacitance
KR100311035B1 (ko) 효율적으로 배치된 패드들을 갖는 반도체 메모리 장치
KR100390615B1 (ko) 반도체 메모리 장치
US5142492A (en) Semiconductor memory device
JPS57179997A (en) Semiconductor memory
US5926410A (en) Memory array architecture and method for dynamic cell plate sensing
US5420816A (en) Semiconductor memory apparatus with configured word lines to reduce noise
US5245579A (en) Semiconductor memory device
JPH0734184B2 (ja) チップ選択端子対を備える半導体装置
EP0083099A2 (fr) Circuit de mémoire
EP0831494B1 (fr) Circuit décodeur pour dispositif de mémoire à semi-conducteurs
JPS5577083A (en) Semiconductor memory unit

Legal Events

Date Code Title Description
PC Patent ceased (i.e. patent has lapsed due to the failure to pay the renewal fee)

Effective date: 20031124

PC Patent ceased (i.e. patent has lapsed due to the failure to pay the renewal fee)