JP2000516042A - 半導体チップの取付け方法 - Google Patents
半導体チップの取付け方法Info
- Publication number
- JP2000516042A JP2000516042A JP10517431A JP51743198A JP2000516042A JP 2000516042 A JP2000516042 A JP 2000516042A JP 10517431 A JP10517431 A JP 10517431A JP 51743198 A JP51743198 A JP 51743198A JP 2000516042 A JP2000516042 A JP 2000516042A
- Authority
- JP
- Japan
- Prior art keywords
- chip
- recess
- tool
- mounting
- tip
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W95/00—Packaging processes not covered by the other groups of this subclass
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
- H10W70/68—Shapes or dispositions thereof
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/099—Connecting interconnections to insulating or insulated package substrates, interposers or redistribution layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
- H10W70/68—Shapes or dispositions thereof
- H10W70/682—Shapes or dispositions thereof comprising holes having chips therein
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/0711—Apparatus therefor
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/073—Connecting or disconnecting of die-attach connectors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/073—Connecting or disconnecting of die-attach connectors
- H10W72/07331—Connecting techniques
- H10W72/07337—Connecting techniques using a polymer adhesive, e.g. an adhesive based on silicone or epoxy
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
- H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL
Landscapes
- Die Bonding (AREA)
- Wire Bonding (AREA)
- Nitrogen And Oxygen Or Sulfur-Condensed Heterocyclic Ring Systems (AREA)
Abstract
Description
Claims (1)
- 【特許請求の範囲】 1.くぼみ(2)を実装面の中に形成し、チップ(3)は、その中心部分に平ら な端と毛細管の穴(5)とを有する把持ツール(4)によってそのおもて面から 把持され、前記穴がツール端の方へラッパ状に広がっており、前記チップ(3) は、くぼみ(2)より上向きであり、チップ(3)のおもて面が実装面と一致す るまで前記くぼみにプレスされ、その後、把持ツールが解放される半導体チップ の取付け方法において、 くぼみ(2)が、チップ(3)の寸法を越える寸法を有し、くぼみ(2)にチ ップ(3)をプレスすることに先立って前記くぼみの中にバインダー(6)の所 定量を配置し、チップ(3)の外形を越えて延在するツールの平らな端の部分が 実装面に押し込まれるまで、チップ(3)が前記バインダー(6)にプレスされ るので、チップ(3)とくぼみ(2)の表面との間で閉じ込められた空間が部分 的又は完全にバインダー(6)で満たされることを特徴とする半導体チップの取 付け方法。 2.集積回路基板(1)の表面,パッケージの表面,又はハイブリッド集積回路 のベースの表面は、実装面として用いることを特徴とする請求項1記載の半導体 チップの取付け方法。 3.バインダー(6)が固まるまで、把持ツールは解放されないことを特徴とす る請求項1記載の半導体チップの取付け方法。 4.バインダー(6)の所定量を配置することに先立って、くぼみ(2)の表面 が少なくとも部分的に金属で覆われており、導電性材料をバインダー(6)とし て用いることを特徴とする請求項1記載の半導体チップの取付け方法。 5.チップ(3)をくぼみ(2)にプレスしている間、振動は、把持ツール(4 ),回路基板(1),パッケージ,又はハイブリッド集積回路のベースに加えるこ とを特徴とする請求項2記載の半導体チップの取付け方法。 6.真空吸引カップを把持ツール(4)として用い、前記把持ツールは、真空吸 引カップから真空の発生源の接続を遮断することによって開放することに先立っ て真空吸引カップに0.1mmHg〜300mmHgの過剰な圧力を加えること を特徴とする請求項1,請求項2,請求項3,請求項4,又は請求項5記載の半導体 チップの取付け方法。 7.くぼみ(2)の長さと幅とがそれぞれ、0.01mm〜1.0mmだけチッ プ寸法を越え、前記くぼみ(2)の深さが0.001mm〜0.5mmだけチッ プの厚さを越え、把持ツール(4)は1μm〜500μmだけくぼみ(2)の限 度を越えて、その平らな端で延在することを特徴とする請求項1,請求項2,請求 項3,請求項4,又は請求項5記載の半導体チップの取付け方法。 8.チップ(3)をプレス・インしている間、ツール(4)の平らな端の部分は 、くぼみ(2)を形成し、その領域上にトポロジー的な金属被覆パターン(7) のない表面に押し込むことを特徴とする請求項1,請求項2,請求項3,請求項4, 又は請求項5記載の半導体チップの取付け方法。
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| PCT/RU1996/000292 WO1998015974A1 (en) | 1996-10-10 | 1996-10-10 | Method for mounting the crystal of semi-conductive device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2000516042A true JP2000516042A (ja) | 2000-11-28 |
| JP3667773B2 JP3667773B2 (ja) | 2005-07-06 |
Family
ID=20130047
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP51743198A Expired - Lifetime JP3667773B2 (ja) | 1996-10-10 | 1996-10-10 | 半導体チップの取付け方法 |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US6261492B1 (ja) |
| JP (1) | JP3667773B2 (ja) |
| KR (1) | KR100431031B1 (ja) |
| RU (1) | RU2136078C1 (ja) |
| SE (1) | SE522045C2 (ja) |
| WO (1) | WO1998015974A1 (ja) |
Families Citing this family (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| RU2171520C2 (ru) * | 1999-05-25 | 2001-07-27 | Воронежский государственный технический университет | Способ сборки полупроводниковых приборов |
| US6676778B1 (en) * | 2000-06-19 | 2004-01-13 | Hitachi Global Storage Technologies Netherlands B.V. | Method for bonding slider and suspension together and deciding conditions of laser beam irradiation |
| FR2819080B1 (fr) * | 2000-12-28 | 2004-02-06 | Thomson Csf | Procede d'assemblage d'un composant tel qu'un circuit integre sur un substrat |
| RU2194337C1 (ru) * | 2001-06-22 | 2002-12-10 | Федеральное государственное унитарное предприятие "Научно-производственное предприятие "Исток" | Устройство для монтажа кристалла |
| US7534320B2 (en) * | 2005-11-15 | 2009-05-19 | Northrop Grumman Corporation | Lamination press pad |
| US7790507B2 (en) * | 2007-03-24 | 2010-09-07 | Texas Instruments Incorporated | Semiconductor die collet and method |
| RU2387045C2 (ru) * | 2008-04-18 | 2010-04-20 | Государственное образовательное учреждение высшего профессионального образования "Воронежский государственный технический университет" | Способ сборки полупроводниковых приборов |
| RU2527661C1 (ru) * | 2013-02-11 | 2014-09-10 | Открытое акционерное общество "Концерн радиостроения "Вега" | Способ группового монтажа кристаллов при сборке высокоплотных электронных модулей |
| US11133866B2 (en) | 2014-02-25 | 2021-09-28 | Pharmaseq, Inc. | All optical identification and sensor system with power on discovery |
| JP6244060B2 (ja) * | 2016-01-06 | 2017-12-06 | 新電元工業株式会社 | 半導体デバイスの載置台及び車載装置 |
| CN107408542B (zh) * | 2016-01-06 | 2019-07-26 | 新电元工业株式会社 | 半导体器件的载置台以及车载装置 |
| US10882258B1 (en) * | 2016-01-22 | 2021-01-05 | Pharmaseq, Inc. | Microchip affixing probe and method of use |
| DE102018208881B4 (de) * | 2018-06-06 | 2021-04-22 | Vitesco Technologies GmbH | Verfahren und Vorrichtung zur Bestückung eines Trägers mit einem Bauteil |
| EP4104317A4 (en) | 2020-02-14 | 2024-03-06 | P-Chip Ip Holdings Inc. | LIGHT TRIGGERED TRANSPONDER |
| US12003967B2 (en) | 2020-09-17 | 2024-06-04 | P-Chip Ip Holdings Inc. | Devices, systems, and methods using microtransponders |
Family Cites Families (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US2264632A (en) * | 1939-02-14 | 1941-12-02 | Armstrong Cork Co | Adhesive applying device |
| US3963551A (en) * | 1974-03-05 | 1976-06-15 | Stromberg-Carlson Corporation | Method for bonding semiconductor chips |
| NL7905518A (nl) * | 1978-07-19 | 1980-01-22 | Matsushita Electric Ind Co Ltd | Werkwijze voor het monteren van elektronische delen. |
| US4480983A (en) * | 1982-05-13 | 1984-11-06 | Motorola, Inc. | Collet and method for dispensing viscous materials |
| GB2138205B (en) * | 1983-04-13 | 1986-11-05 | Philips Electronic Associated | Methods of manufacturing a microwave circuit |
| FR2599893B1 (fr) * | 1986-05-23 | 1996-08-02 | Ricoh Kk | Procede de montage d'un module electronique sur un substrat et carte a circuit integre |
| US4749120A (en) * | 1986-12-18 | 1988-06-07 | Matsushita Electric Industrial Co., Ltd. | Method of connecting a semiconductor device to a wiring board |
| RU2003207C1 (ru) * | 1990-12-26 | 1993-11-15 | Институт точной механики и вычислительной техники им.С.А.Лебедева РАН | Способ изготовлени гибридной интегральной схемы |
| US5433810A (en) * | 1992-09-16 | 1995-07-18 | Abrams; Herbert M. | Lamination of composite eyeglass lenses |
-
1996
- 1996-10-10 KR KR10-1998-0704321A patent/KR100431031B1/ko not_active Expired - Lifetime
- 1996-10-10 US US09/091,080 patent/US6261492B1/en not_active Expired - Lifetime
- 1996-10-10 JP JP51743198A patent/JP3667773B2/ja not_active Expired - Lifetime
- 1996-10-10 RU RU98112604/25A patent/RU2136078C1/ru not_active IP Right Cessation
- 1996-10-10 WO PCT/RU1996/000292 patent/WO1998015974A1/ru not_active Ceased
-
1998
- 1998-06-03 SE SE9801965A patent/SE522045C2/sv not_active IP Right Cessation
Also Published As
| Publication number | Publication date |
|---|---|
| US6261492B1 (en) | 2001-07-17 |
| SE9801965D0 (sv) | 1998-06-03 |
| KR19990072027A (ko) | 1999-09-27 |
| RU2136078C1 (ru) | 1999-08-27 |
| WO1998015974A1 (en) | 1998-04-16 |
| KR100431031B1 (ko) | 2004-07-27 |
| SE9801965L (sv) | 1998-06-03 |
| JP3667773B2 (ja) | 2005-07-06 |
| SE522045C2 (sv) | 2004-01-07 |
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