JPH01128588A - Hybrid integrated circuit device - Google Patents

Abstract

PURPOSE:To enhance mounting density, to trim resistors accurately and to decrease the number of trimming steps, by covering a part of a lower resistor layer with an insulating layer, and forming an upper resistor layer on the insulating layer so as to cross over the lower resistor layer. CONSTITUTION:A print resistor 1, whose main component is titanium silicide, is printed on a board 5. After drying, the device is baked at a temperature of about 925 deg.C in N2. Thereafter, inorganic glass based insulating layer 2 is printed and dried on the printed resistor 1. The device is baked at a temperature of about 925 deg.C in N2. Thereafter, a titanium silicide based print resistor 3, which is electrically insulated from the printed resistor 1 with the insulating layer 2 and crosses over the printed resistor 1, is printed and dried. The device is baked at a temperature of about 925 deg.C in N2. Thus, the device is formed. Thereafter, the resistors are trimmed all together.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a hybrid integrated circuit device that can be used in the circuitry of electronic communication equipment such as televisions, VTRs, and audio equipment.

BACKGROUND OF THE INVENTION Printed resistors have traditionally been used as a means of increasing the packaging density of hybrid integrated circuit devices. In this case, the printed resistor is formed for each single layer or multiple layers.

Conventional examples are shown in FIGS. Figure 5 shows an example of a conventional single-layer hybrid integrated circuit device, where (&) is a cross-sectional view of the resistor part, Figure (b) is a perspective view, and the sixth column is a conventional hybrid integrated circuit device. FIG. 4 shows a cross-sectional view of a resistor portion in an example of a multilayer hybrid integrated circuit device.

5 and 6, 21 and 22 are single-layer printed resistors, 23 is a conductor, 24 is a substrate, 25 is a multilayer lower layer printed resistor, 26 is an insulating layer, and 27 is a multilayer upper layer printed resistor. , 28 are trimming grooves.

Problems to be Solved by the Invention However, in the above conventional example, (1) the area occupied by the printed resistor is the sum of the area of each main body and the put space for trimming, etc., which is an obstacle to increasing the packaging density.

(2) Only in the case of multiple layers, (a))! The insulating layer 26 is destroyed during J-mining, which adversely affects the resistance value.

Φ) The insulating layer 26 is as thin as several tens of micrometers, and if there is a conductor or the like underneath it, there is a risk of damage during trimming.

(C) There is a resistor trimming process for each layer, which increases the number of man-hours.

(d) After trimming the resistance of the lower layer, heat treatment such as forming an insulating layer is performed, resulting in problems such as difficulty in controlling the final resistance value.

SUMMARY OF THE INVENTION In view of the above problems, it is an object of the present invention to provide a hybrid integrated circuit device that can increase packaging density, accurately manufacture printed resistors, and reduce man-hours.

Means for Solving the Problems In order to solve the above problems, the hybrid integrated circuit device of the present invention includes a titanium silicide printed resistor formed on a ceramic substrate, and an inorganic glass based printed resistor formed on a portion of the printed resistor. Alternatively, an organic insulating layer is formed, and a titanium silicide or organic printed resistor is formed on the insulating layer by crossing over with the printed resistor.

Operation The present invention can reduce the area occupied by the printed resistor and increase the packaging density by using the above-described configuration. In addition, all the trimming of printed resistors is done on the ceramic substrate and can be done all at once at the end, so the precision of the resistance value is 6.
While there is a variation of % to 10%, in the present invention it is possible to reduce the variation to 1% or less. Furthermore, the number of man-hours for trimming can be reduced.

Embodiment Hereinafter, a hybrid integrated circuit device according to an embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a sectional view of a printed resistor portion of a hybrid integrated circuit device according to a first embodiment of the present invention, and FIG. 2 is a perspective view of the same printed resistor portion.

In FIGS. 1 and 2, 1 is a lower layer printed resistor made of titanium silicide, 2 is an insulating layer made of inorganic glass such as borosilicate glass,
3 is a titanium silicide printed resistor that crosses over with the printed titanium silicide resistor 1, 4 is a conductor such as CU, and 5 is 92%~
A ceramic substrate made of 99% Narumina or the like, and 6 are trimming grooves.

A method for forming a hybrid integrated circuit device having the above-mentioned components will be described below. A printed resistor 1'i whose main component is titanium silicide is printed on a substrate 6, dried, and then fired in N2 at a temperature of about 926°C. After that, an inorganic glass-based insulating layer 2 is printed on the printed resistor 1, dried, and heated to 925°C.
Calcinate in N2 at around temperature. After that, printed resistor 1
is a printed resistor 3 made of titanium silicide that is electrically insulated by an insulating layer 2 and crosses over with the printed resistor 1.

After drying, it is formed by firing in N2 at a temperature of around 925°C. In this way, nine overlapping printed resistors 1 and 3 electrically insulated by the insulating layer 2 are formed. Trimming of the resistors is then done collectively.

Incidentally, the conductor 4 such as CU is formed before the lower printed resistor 1 is formed.

As described above, according to the embodiment, a part of the lower resistor 1 is covered with the insulating layer 2, and the upper resistor 3 is formed by crossing over to the lower resistor 1 on the insulating layer 2, thereby increasing the packaging density. It is possible to trim the resistor with high accuracy and reduce the number of trimming steps.

FIG. 3 is a sectional view of a printed resistor portion of a hybrid integrated circuit device according to a second embodiment of the present invention, and FIG. 4 is a perspective view of the same printed resistor portion.

In FIGS. 3 and 4, 1, 4 to 6 refer to FIG. 1.

Similarly to FIG. 2, 1 represents a lower layer titanium silicide printed resistor, 4 a conductor such as CU, 5 a ceramic substrate made of 92% to 99% alumina, etc., and 6 a trimming groove. 1
1 is an organic insulating layer made of epoxy resin or the like, and 12 is an organic printed resistor whose main component is carbon or the like.

After printing the entire titanium silicide printed resistor 1 and drying it, the organic insulating layer 11 is baked in air at a temperature of around 926°C.
f, printing on printed resistor 1;

After that, it is cured at a temperature of about 50° C. to 200° C., and then the printed resistor 1 is electrically insulated by the insulating layer 11, and the organic printed resistor 12 that crosses over the printed resistor 1 is completely printed. It is cured at a temperature of about 200°C to 200°C. In this way, printed resistors 1.12 are formed which are electrically insulated by the insulating layer 11.

As described above, according to the present example, the same effects as the first example can be achieved, and the insulating layer can be formed at a lower temperature than the first example.

Effects of the Invention As described above, according to the present invention, a part of the lower layer resistor is covered with an insulating layer, and the upper layer resistor is formed by crossing over to the lower layer resistor on the insulating layer, thereby increasing the packaging density. , the resistor can be trimmed with high precision and the number of trimming steps can be reduced.

[Brief explanation of the drawing]

FIG. 1 is a sectional view of a printed resistor portion of a hybrid integrated circuit device according to a first embodiment of the present invention, FIG. 2 is a perspective view of the same resistor portion, and FIG. 3 is a second embodiment of the present invention. 4 is a perspective view of the resistor portion, and FIG. 6 (&) is a sectional view of the resistor portion of the conventional single-layer hybrid integrated circuit device. FIG. 6B is a perspective view of the resistor portion, and FIG. 6 is a sectional view of the printed resistor portion of a conventional multilayer hybrid integrated circuit device. 1... lower layer printed resistor (titanium silicide system), 2.
... Insulating layer (inorganic glass type), 3 ... Upper layer printed resistor (titanium silicide system), 4 ... Conductor such as CU, 6 ... Ceramics Board, 6...
...Resistance trimming groove, 11... Insulating layer (organic type), 12... Upper layer printed resistor (organic type). Name of agent: Patent attorney Toshio Nakao and one other person f-
--Lower grade IJ + 1-year-old anti-salary (titanium silicide) 2--Issei ball/IJ (black 1 quart glass loaf) No. 12 6
- Trimming nose No. 2 [F] 11-One color expression eyebrow (organic type), Z-11 upper man seal J'IP-Antibody (shoulder machine, Figure 3, Figure 4)

Claims (1)

[Claims] a resistor mainly composed of titanium silicide formed on a ceramic substrate; an insulating layer made of at least one of inorganic glass and organic insulator formed on a portion of the resistor; and the insulating layer on the resistor. 1. A hybrid integrated circuit device comprising: a resistor whose main component is titanium silicide or an organic resistor which is formed through the use of titanium silicide.