JPH0213378U - - Google Patents
Info
- Publication number
- JPH0213378U JPH0213378U JP9167488U JP9167488U JPH0213378U JP H0213378 U JPH0213378 U JP H0213378U JP 9167488 U JP9167488 U JP 9167488U JP 9167488 U JP9167488 U JP 9167488U JP H0213378 U JPH0213378 U JP H0213378U
- Authority
- JP
- Japan
- Prior art keywords
- line
- line memory
- signal
- output signal
- switching
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 claims description 3
- 238000006243 chemical reaction Methods 0.000 claims 2
- 230000003111 delayed effect Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 7
Landscapes
- Television Systems (AREA)
Description
第１図は本考案の一実施例の回路ブロツク図、
第２図は第１図の実施例の各部の出力信号の時間
関係を示す図、第３図は第１図の実施例の再生画
像の例を模式的に示す図、第４図は従来例の回路
ブロツク図、第５図は第４図の従来例の各部の出
力信号の時間関係を示す図、第６図は第４図の従
来例の再生画像の例を模式的に示す図、第７図は
第１図の実施例及び第４図の従来例への入力画像
の一例を模式的に示す図、第８図は第４図の従来
例の再生画像の他の例を模式的に示す図である。
１…インターレース映像信号の入力端子、２…
ノンインターレース映像信号の入力端子、３，７
，１５…スイツチ、４…ライン補間信号生成回路
、４ａ，１４…遅延回路、５，６…ラインメモリ
、ｎ，ｎ＋１，ｎ′，ｎ＋１′…単密の映像信号
の走査線の番号、Ｎ，Ｎ＋１，Ｎ′，Ｎ＋１′…
倍密の映像信号の走査線の番号。
FIG. 1 is a circuit block diagram of an embodiment of the present invention.
2 is a diagram showing the time relationship of the output signals of each part of the embodiment of FIG. 1, FIG. 3 is a diagram schematically showing an example of a reproduced image of the embodiment of FIG. 1, and FIG. 4 is a conventional example. 5 is a diagram showing the time relationship of the output signals of each part of the conventional example shown in FIG. 4. FIG. 6 is a diagram schematically showing an example of a reproduced image of the conventional example shown in FIG. 7 is a diagram schematically showing an example of an input image to the embodiment of FIG. 1 and the conventional example of FIG. 4, and FIG. 8 is a diagram schematically showing another example of the reproduced image of the conventional example of FIG. 4. FIG. 1...Input terminal for interlaced video signal, 2...
Input terminal for non-interlaced video signal, 3, 7
, 15... Switch, 4... Line interpolation signal generation circuit, 4a, 14... Delay circuit, 5, 6... Line memory, n, n+1, n', n+1'... Single density video signal scanning line number, N, N+1, N', N+1'...
Scanning line number of double-density video signal.
Claims (1)
し速度が書き込み速度の２倍である第１のライン
メモリと、 前記映像信号と、前記映像信号を１水平走査期
間又は１フイールド期間遅延させた映像信号とを
加え合せ、この加え合せた信号を１／２倍して出
力するライン補間信号生成回路と、 前記ライン補間信号生成回路の出力信号を入力
させる、１水平走査期間分の映像信号を記憶し、
読み出し速度が書き込み速度の２倍である第２の
ラインメモリと、 前記第１のラインメモリと前記第２のラインメ
モリの出力信号を１水平走査期間分の出力信号毎
に切り換えて出力するスイツチ手段とを備えた走
査線変換回路において、 ノンインターレースの映像信号が入力された場
合に、前記第２のラインメモリ側の出力信号を一
定の出力信号に切り換える切換手段を設けたこと
を特徴とする走査線変換回路。[Claims for Utility Model Registration] A first line memory that stores video signals for one horizontal scanning period and whose read speed is twice the writing speed; or a line interpolation signal generation circuit which adds the video signal delayed by one field period, multiplies the sum by 1/2 and outputs the resultant signal; and one horizontal line into which the output signal of the line interpolation signal generation circuit is input. Stores video signals for the scanning period,
a second line memory whose reading speed is twice the writing speed; and a switch means for switching and outputting the output signals of the first line memory and the second line memory for each output signal of one horizontal scanning period. A scanning line conversion circuit comprising: a switching means for switching the output signal of the second line memory side to a constant output signal when a non-interlaced video signal is input. Line conversion circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9167488U JPH0213378U (en) | 1988-07-11 | 1988-07-11 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9167488U JPH0213378U (en) | 1988-07-11 | 1988-07-11 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0213378U true JPH0213378U (en) | 1990-01-26 |
Family
ID=31316142
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9167488U Pending JPH0213378U (en) | 1988-07-11 | 1988-07-11 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0213378U (en) |
-
1988
- 1988-07-11 JP JP9167488U patent/JPH0213378U/ja active Pending
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