JPH022296B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor integrated circuit device having resistors that require matching with each other, and particularly to a method for manufacturing a device having a plurality of resistors that require the same peripheral pattern distribution.

A resistor in a semiconductor integrated circuit device is formed by a resistor pattern using photoresist or the like by photolithography or the like. The resistor is selectively formed by a thermal diffusion method, an ion implantation method, a doped oxide method, or the like. In particular, the resistor pattern is created by etching using a master pattern. A method of forming a resistance region by introducing impurities such as boron, phosphorus, antimony, and arsenic is also used.

In electronic circuits, especially when forming semiconductor elements that require matching characteristics, conventional methods take into account the effects of variations in layer resistance during impurity diffusion and variations in element dimensions during diffusion mask fabrication. Pattern design has been carried out with consideration given to arranging two or more matching elements as close as possible and making the shapes and directions of the patterns the same.

However, this consideration alone did not result in sufficient consistency. This is thought to be due to the inability to correct deviations in element dimensions from design values due to interference between patterns during photoetching. In other words, in photo-etching technology, a pattern drawn on a mask is printed onto a photoresist (photosensitive resin) coated on a silicon substrate using a contact exposure method or a projection exposure method. If the area of the mask is different, the areas irradiated with light will undergo a photopolymerization reaction and harden, and the areas not irradiated with light will be removed by development. matches. Therefore, when forming three resistors arranged in parallel, light is irradiated onto parts other than the resistor pattern. Therefore, when viewed in plan, the exposure area outside the resistor patterns located at both left and right ends is wider than the exposure area in the portion sandwiched by the resistor patterns (both sides of the central resistor pattern). As a result, the amount of light irradiation differs depending on the region, and the outer regions receive a lot of light and the degree of polymerization becomes dense, but the region between the patterns receives less irradiation and the degree of polymerization becomes rough. Moreover, as the pattern interval becomes narrower with miniaturization, the degree of polymerization becomes smaller. Therefore, in the fixing (rinsing) process during development, the portions that are not sufficiently polymerized (the portions sandwiched between the resistor patterns) are not dissolved. On the other hand, since the outside of the resistance pattern located at both ends is sufficiently polymerized, the above-mentioned dissolution is small. Therefore, the width of the resistance pattern at the center inevitably becomes wider than that at both ends, resulting in variations in resistance values.

On the other hand, when using a positive resist, the exposed areas are removed so that the bright areas of the mask match the resistor pattern. Therefore, in this case, the areas of the exposed resist regions are equal. However, the part corresponding to the dark part sandwiched on both sides by the resistor pattern (on both sides of the central resistor pattern) is affected by the wraparound of light from the adjacent resistor pattern (bright part) and the reflection of refracted light. Since the distance between the patterns is narrow, mutual interference occurs, resulting in unnecessary exposure. On the other hand, since the resistor patterns at both ends are not affected by light from outside, unnecessary exposure is reduced to about half. As a result, the width of the resistor pattern at the center becomes wider than the widths of the resistor patterns at both ends, resulting in large variations in resistance values.

Therefore, if, for example, three slits of the same width are arranged in parallel at equal intervals using conventional photolithography, the width of the central slit will be wider than the width of the slits on either side of it in the printed resist pattern. As described above, it is not possible to achieve the desired alignment by simply arranging patterns that have been considered when forming semiconductor elements that require alignment. Furthermore, the above-mentioned development occurs during pattern transfer during mask production, and the mask pattern itself cannot have the designed dimensions, increasing the deviation of the pattern dimensions from the designed values.

SUMMARY OF THE INVENTION An object of the present invention is to provide a method for manufacturing a semiconductor integrated circuit device having a structure in which highly matched elements can be obtained.

According to the present invention, in addition to the original resistance pattern, a non-resistance pattern having no relation to the circuit is added so that the peripheral pattern distribution conditions of the resistors to be matched with each other are the same.

Next, an example of a semiconductor integrated circuit device according to the present invention will be explained with reference to the drawings.

Figure 1 shows a case where a resistance element is formed that requires a resistance value ratio of 1:2, and diffused resistance elements A, B, and C having the same shape and dimensions are arranged in parallel with the same spacing. formed on a semiconductor substrate. One end of each of the resistive elements A and B is connected to an aluminum wiring 1 through contact parts 2 and 3, respectively, and the other end is connected to a wiring 4 through contact parts 5 and 6, respectively. Both ends of the resistance element C are connected to wirings 8 and 9 through contact portions 6 and 7, respectively. Resistance elements A, B, and C have the same shape and dimensions,
Since they have the same impurity concentration, if each resistance value is R, the resistance value between wirings 1 and 4 is R/2, wirings 8,
The resistance value between 9 and 9 is R. However, in the past, it has not been possible to make the resistive elements A, B, and C exactly the same shape and size.

In this invention, floating diffusion regions D ₁ , which are unrelated to the resistive elements A, B, and C in terms of circuit so that the peripheral pattern distributions of the resistive elements A, B, and C are the same, are
D ₂ is provided. The diffusion regions D ₁ are arranged parallel to each other and facing each other with the same distance d ₁ as the distance d ₁ between the elements A and B on the opposite side of the resistance element A from the element B,
And its length l ₁ is the same as that of elements A, B, and C. Similarly, floating diffusion regions D ₂ having a length l ₁ are provided on the opposite side of the resistance element C from the element B, parallel to each other and facing each other with a distance d ₁ between them. The widths of regions D ₁ and D ₂ do not need to be the same as the widths of resistive elements A, B, and C.

According to the above configuration, the peripheral pattern distribution conditions of the respective patterns of resistive elements A, B, and C are completely the same, and the floating regions D ₁ , D ₂ are formed at the same time as the resist patterns for forming resistive elements A, B, and C. The resist pattern for each element is also formed at the same time, so that the effects on each element A, B, and C during exposure and development are exactly the same, and the resistive elements A, B, and C of the same size are
B and C are obtained, and the width of element B is never larger than each width of elements A and C.

In FIG. 2, floating diffusion regions D ₁ and D ₂ are formed outside of resistance elements A and B arranged in parallel to each other,
Wires 1 and 4 are connected to both ends of these resistance elements A and B, respectively.
It is used as a parallel resistor by connecting it to . A resistive element C that should be separated from and matched with these resistive elements A and B.
is formed, and at this time, floating diffusion regions D ₃ and D ₄ are simultaneously formed on both sides of the resistance element C. Area D ₁ between elements A, between elements A and B, between element B area D ₂ , element C
and areas _D3 and _D4 are all the same.
In this case as well, the dimensions of the resistive elements A, B, and C can be precisely matched. FIG. 3 shows a case where another element E is formed in place of the floating region D ₂ in FIG. 1. The spacing between elements E and C is d ₁ .

As an example, if the resistance pattern width is 10μ and the pattern spacing is 10μ, use a negative resist (OMR-83) manufactured by Tokyo Ohka Kogyo Co., Ltd., and the thickness of the silicon oxide film is
In a conventional resistor formed using buffered HF with a 1:6 ratio of fluoric acid and ammonium fluoride as an etching solution, the variation in matching was 2 to 5% between both ends and the center, but in this example, it was 1%. It was within. Furthermore, the above is an example in which a negative type photoresist is used, that is, for example, in _{FIG .} There is no pattern, and the exposed and polymerized resist remains in other areas, but on the contrary, patterns A, B,
The present invention is also applicable to the case of using a positive type photoresist in which portions C, D ₁ and D ₂ are irradiated with light and those portions are removed.

[Brief explanation of drawings]

Fig. 1 is a plan view of an example of the device of the present invention in which two resistance elements requiring matching are arranged side by side, Fig. 2 is a plan view of a case in which a resistance element requiring matching is arranged singly, and Fig. 3 The figure is a plan view showing still another example of the device of the present invention. A, B, C: resistance element as a semiconductor element,
D ₁ , D ₂ , D ₃ , D ₄ : floating diffusion regions.

Claims (1)

[Claims] 1. A plurality of resistors each consisting of a band-shaped diffusion region having substantially the same width and length are arranged in parallel at equal intervals, and outside the parallel arrangement of the plurality of resistors, there is a space between the resistors. a diffusion region disposed in parallel with the resistor at equal intervals and included in another element region having a length equal to or longer than the length of the resistor;
A method of manufacturing a semiconductor integrated circuit device, wherein the plurality of resistors and the diffusion region are formed simultaneously in the same manufacturing process.