JPH02264344A - Address designating method for memory device - Google Patents

Abstract

PURPOSE:To expand memory capacity without necessitating to change hardware design by using the designation of the selection of a memory cell when a value stored in a specified address is accessed by another address. CONSTITUTION:Plural memory cells mapped on the same address, a latch and a decode circuits for selecting the memory cell and a circuit for latch and decode are assembled in a memory device 100. The latch circuit 200 decodes the value stored in the memory cell, and forms a select signal. Access to the memory becomes possible by only executing a WRITE instruction for the memory. Thus, the memory capacity can be increased without changing the hardware design of a computer.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method of addressing a memory device used in an electronic computer or the like.

[Conventional technology]

In recent years, the functionality of electronic computers has increased significantly, and even in individual computer systems, it is often necessary to improve the functionality of basic programs such as basic attendance system programs. These basic programs are usually stored in ROM (read-only memory) in the computer hardware.
In many cases, these basic programs are implemented as such, and when these basic programs become longer and longer in order to achieve higher functionality, it becomes necessary to increase the capacity of the ROM installed in the computer.

However, in actual computer systems, in order to maintain compatibility with previous models in terms of software and hardware,
Since the type of CPU used and the bus configuration of the equipment cannot be changed significantly, the memory space of the computer cannot be immediately expanded even if the capacity of the ROM program increases.

In such cases, the number of memories that can be connected to the bus is often increased by mapping multiple ROMs to the same memory address using a method called bank memory.

In this bank memory system, originally, as shown in Fig. 2(a)
In order to expand the capacity of ROM10 that was connected to the computer bus as shown in FIG. input/output address (Figure 2)
In the example of b), the latch circuit 16 and decode circuit 18 at address FOOO) have conventionally been attached as external circuits. When specific data is output to that address, that data is decoded and a selection signal is output, and the selection signal causes multiple memories (banks) mapped to the same address, in the example shown, the first ROM (
Bank 1) 20 and second ROM (Bank 2) 22
I was able to choose one of them.

[Problem to be solved by the invention]

However, in order to increase the memory capacity using these conventional methods, it is necessary to add a latch circuit and a decoding circuit to the computer bus, and then connect the selection signal from there to the memory, which requires the computer hardware to This required considerable changes to the design.

SUMMARY OF THE INVENTION An object of the present invention is to provide a method for addressing a memory device that can expand memory capacity without requiring changes to hardware design.

[Means to solve the problem]

The addressing method for a memory device of the present invention provides a memory device having a configuration in which a plurality of memory cells are mapped to the same memory address. The value is used to specify the selection of a memory cell to be connected when accessed using another individual memory address.

〔Example〕

FIG. 1 shows the configuration of an example of a memory device to which the addressing method of the present invention is applied. This includes multiple memory cells mapped to the same address in the configuration shown in Figure 2,
This corresponds to one memory device 100 that includes a latch for selecting memory cells and a decoding circuit. However, in FIG. 1, circuits for latching and decoding are also incorporated into the memory device 100. Therefore, this circuit is not used for input/output address, but for memory device 1.
Part of the memory address included in 00 (3 in Figure 1)
FFF address). Therefore, the latch circuit stores the memory cell (bank l) corresponding to the memory address.
) can be considered as itself, 7321 times m2oo
decodes the value written in the memory cell (bank 1) to form a selection signal.

Such a memory device can be configured and used as a ROM. And 3FFF which is a specific address
Addresses are used to switch memory banks. Therefore,
Although the memory space is not completely contiguous, there is no particular problem when using it as a ROM for a fixed program.

FIG. 3 conceptually shows the structure of the program written as contents in this ROM. Originally Figure 3(a)
When expanding the capacity by rewriting a ROM program with the contents as shown in FIG. An OUT command for the input/output port is required for switching, indicating that an external circuit other than the ROM is required.

On the other hand, in the configuration according to the method of the present invention shown in FIG. 1, as shown in FIG.
Only the ITE instruction is required, and if this is for an address included in the ROM itself, it can be seen that there is no need to change anything externally attached other than the ROM.

That is, if a bank type ROM is made using the method of the present invention,
It can be simply replaced with an old small-capacity ROM, and there is no need to change the computer bus connection. This is a great advantage when designing a new model of computer. In addition, it is possible to easily improve the functionality of a computer already in use by a customer by replacing the ROM, which is also a great advantage.

In addition to the above-mentioned ROM, the addressing method for a memory device according to the present invention can also be configured and used as a RAM (random access memory). However, since specific addresses are used to specify banks, the memory space is not completely contiguous, and care must be taken when using RAM as it is used for general purposes.

(Effects of the Invention) As described above, according to the present invention, it is possible to increase the memory capacity without requiring changes to the hardware design of the computer.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing a configuration example of a memory device to which the present invention is applied, and FIG. 2 is a block diagram showing a method of expanding ROM memory capacity using a conventional method. (b)
Figure 3 shows the configuration of the program written in the ROM, where (a) is before the ROM capacity is expanded, (b) is when expanded using the conventional method, (C ) is a diagram showing the case of expansion using the method of the present invention. 10, 20.22...ROM 12... 14... 16... 18, 200 100... Data bus, address bus, latch circuit, decoding circuit, memory device

Claims (1)

[Claims] (1) In a memory device having a configuration in which a plurality of memory cells are mapped to the same memory address, the value written in the memory cell corresponding to a specific address among the memory addresses included in the memory device is transferred to other individual memory devices. 1. A method for specifying addresses for a memory device, characterized in that the method is used to select a memory cell to be connected when the memory address is accessed.