JPH0237102B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an integrated circuit having a predetermined function by connecting a plurality of types of elements.

Generally, in integrated circuits, in order to drive devices outside the chip, an element with a larger driving capacity than that for driving circuits inside the chip may be required.

For this reason, conventionally, for example, the pattern of a transistor has been made larger than that of a transistor for use within a chip.

However, as patterns become more complex as devices become more highly integrated, having different pattern sizes for the same transistor complicates the design. For example, even in circuits inside a chip, if it is desired to set the propagation delay time or power consumption of some circuits to desired values different from those of other circuits within the chip, the pattern dimensions must be changed.

SUMMARY OF THE INVENTION An object of the present invention is to solve these conventional drawbacks and provide an integrated circuit that is easy to design and can easily obtain desired characteristics.

Such features of the present invention include first and second transistors whose emitters are connected to each other, and first and second transistors whose emitters are connected between the respective collectors of the first and second transistors and a first power supply. 2 resistance and
a third transistor whose collector is connected to the first power supply and whose base is connected to the collector of the first transistor;
a fourth transistor having a base connected to the collector of the second transistor and a collector connected to the first power source, and a fourth transistor connected between the emitter of the third transistor and the second power source. a third resistor, a fourth resistor connected between the emitter of the fourth transistor and the second power supply, and a fourth resistor connected between the emitters of the first and second transistors and the second power supply. In an integrated circuit having a fifth transistor and a fifth resistor and forming an ECL circuit, a transistor and a resistor having the same pattern dimensions as the transistor and the resistor, respectively, are provided,
All of the transistors and resistors are formed by connecting a predetermined plurality of transistors and resistors in parallel, each having the same pattern size.

The present invention will be explained below using the drawings.

Figure 1 shows conventional ECL (Emitter Coupled Logic)
In the diagram showing an example of the circuit, _T1 to _T5 are transistors,
R ₁ to R ₅ are resistors, V _IN is the signal input terminal, and Vref is the first
The reference voltage terminal of V _BB indicates the second reference voltage terminal.

In the present invention, as shown in FIG. 2, in such an ECL circuit, transistors _T1 ' _{to T5'} are connected to transistors _T1 to _T5 , and resistors _{R 1} ' to _R5 ' were arranged and selectively connected in parallel (in this example, all the elements). Although this increases power consumption, it is possible to increase the driving capability of the ECL circuit.

The elements arranged here are formed by a pattern with the same dimensions as the conventional elements shown in FIG.

Of course, by connecting only desired elements as necessary and leaving other placed elements unconnected, desired characteristics such as the delay time can be achieved simply by arranging elements of the same pattern. can be obtained easily. Also, in the ECL circuit,
In particular, the logic amplitude is small, and the resistors for setting bias conditions must be manufactured with high precision. However, if each resistor is connected in parallel as in the present invention, for example, if two resistors are connected in parallel, one resistor is designed Even if a resistor is manufactured to a value that deviates greatly from the value, if the other resistor is approximately the same as the designed value, the error in the parallel resistor will be small, a resistor with a small error will be obtained, and it will be highly effective as an ECL circuit.

As explained above, according to the present invention, an integrated circuit having desired characteristics can be easily obtained.

[Brief explanation of drawings]

FIG. 1 is a diagram showing an example of a conventional circuit, and FIG. 2 is a diagram showing an embodiment of the present invention. T ₁ to _{T 5} , T ₁ ′ to _{T 5} ′: Transistor, R ₁ to _{R 5} ,
R ₁ ′ to R ₅ ′: Resistance.

Claims (1)

[Claims] 1. First and second transistors T ₁ and T ₂ whose emitters are connected to each other, and between the respective collectors of the first and second transistors T ₁ and T ₂ and a first power supply. the first, connected to
second resistors R ₁ and R ₂ ; a third transistor T ₄ whose base is connected to the collector of the first transistor T ₁ and whose collector is connected to the first power supply; and the second transistor T _{a fourth} transistor T3 whose base is connected to the collector of the third transistor _T3 and whose collector is connected to the first power supply; and a third resistor connected between the emitter of the third transistor _T4 and the second power supply. _R4 , a fourth resistor _R5 connected between the emitter of the fourth transistor _T3 and the second power supply, and a resistor R5 connected between the emitters of the first and second transistors _T1 and _T2 and the second power supply. In an integrated circuit constituting an ECL circuit having a fifth transistor T ₅ and a fifth resistor R ₃ connected between power supplies, each of the transistors T ₁ , T ₂ , T ₃ , T ₄ , T ₅ and Transistors T _{′ 1} , T _{′ 2} , T _{′ 3} , T′ ₄ , T _{′ 5} with the same pattern dimensions as the resistors R ₁ , R ₂ , R ₃ , R ₄ , R _{5 ,} respectively.
and resistors R′ ₁ , R′ ₂ , R′ ₃ , R′ ₄ , R′ ₅ are provided,
An integrated circuit characterized in that all elements of transistors and resistors are formed by connecting a predetermined plurality of transistors and resistors in parallel, each having the same pattern size.