JPH03187293A - Manufacture of copper-clad laminate - Google Patents

Manufacture of copper-clad laminate

Info

Publication number
JPH03187293A
JPH03187293A JP32648889A JP32648889A JPH03187293A JP H03187293 A JPH03187293 A JP H03187293A JP 32648889 A JP32648889 A JP 32648889A JP 32648889 A JP32648889 A JP 32648889A JP H03187293 A JPH03187293 A JP H03187293A
Authority
JP
Japan
Prior art keywords
prepreg
layer
copper foil
contact
resin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP32648889A
Other languages
Japanese (ja)
Inventor
Toshio Nakamura
敏夫 中村
Kaname Takee
竹江 要
Yuji Sekiguchi
裕二 関口
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Resonac Corp
Original Assignee
Hitachi Chemical Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Chemical Co Ltd filed Critical Hitachi Chemical Co Ltd
Priority to JP32648889A priority Critical patent/JPH03187293A/en
Publication of JPH03187293A publication Critical patent/JPH03187293A/en
Pending legal-status Critical Current

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  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

PURPOSE:To eliminate voids in a prepreg layer without linear recesses on an outer layer copper foil by using resins having specific viscosities as a prepreg in contact with an outer layer copper foil of a prepreg layer and a prepreg in contact with a laminate forming an inner layer circuit. CONSTITUTION:As a prepreg A in contact with an outer layer copper foil 2 of a prepreg layer 3, resin having 2000-3000 poises of lowest melting viscosity at 3 deg.C/min of temperature rising speed, and as a prepreg C in contact with a laminate 5 formed with an inner layer circuit 4, resin having less than 1500 poises of lowest melting viscosity at 3 deg.C/min of temperature rising speed is used. That is, as the prepreg A, the resin having high melting lowest viscosity, i.e., small fluidity is used. As the prepreg C, the resin having high fluidity is used. Thus, no linear recess is formed on the outer layer copper foil, and no void is generated in the prepreg layer.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 不発明は、多層プリント板用鋼張り積層板〜製造方法に
関する0 〔従来の技術〕 多層プリント板用銅張り積層板り製造に1工、内層用回
路を形成したjll張り積層板を1枚以上使用しそσ」
外層に率に銅箔を重ねろ方法、成るいを工内層用回路を
形成した銅張り51層板に口じ溶融粘度の樹脂を含浸し
たプリプレグを介して外層用片面鋼張り1MN板を重ね
る方法がある。何れもこれを加熱加圧成形して多ノープ
リント板用鋼張り積層板とする。こり積/i1成形圧は
、通常一定で10〜60kg/an’とし、又は初期段
階は低圧とし、一定時間後に高圧とするσJが普通であ
る。
[Detailed Description of the Invention] [Industrial Field of Application] The invention relates to steel-clad laminates for multilayer printed boards - manufacturing methods. Use one or more JLL-covered laminates on which inner layer circuits are formed.
A method of layering copper foil on the outer layer, which consists of a single-sided steel-clad 1MN plate for the outer layer via a prepreg impregnated with a resin of melting viscosity on a copper-clad 51-layer plate with circuits formed for the inner layer. There is. Both of these are heat-pressed and formed into steel-clad laminates for multiple unprinted boards. The compaction product/i1 molding pressure is usually kept constant at 10 to 60 kg/an', or σJ is usually set at a low pressure in the initial stage and at a high pressure after a certain period of time.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

上記カ各製造方法では外層用鋼陥り形成過程が異なり、
一つは単に銅箔σJみを用い、他は片面鋼張り積層板金
使用して形成するもσノである。
In each of the above manufacturing methods, the process of forming the steel for the outer layer is different.
One is simply formed using copper foil σJ, and the other is formed using single-sided steel-clad laminated sheet metal.

そσJうち、率に銅箔りみ全便用して外層用鋼陥を形成
する方法において、積層板σ」内I−回路層Q〕うち回
路板銅箔がない部分に該当する外層銅箔部に深さが5〜
18μm程度σノ線状窪みが発生し易い。次にその説明
をする0第6図Vこおいて、画面に内層回路4を有する
積層板5にプリプレグ層3を介して外I−銅銅箔を両面
に設け、林状窪み1が外層銅箔に発生し、七〇ノ発生位
11は内/1h回路板銅箔がたい部分に該当する。
In the method of forming the steel recesses for the outer layer by fully applying copper foil, the outer layer copper foil corresponding to the part of the laminate σ" I - circuit layer Q] where there is no circuit board copper foil is used. Depth is 5~
Linear depressions of approximately 18 μm σ are likely to occur. Next, the explanation will be given. In Fig. 6, a laminated board 5 having an inner layer circuit 4 on the screen is provided with outer I-copper foil on both sides through a prepreg layer 3. It occurs on the foil, and the 70th occurrence position 11 corresponds to the part where the copper foil of the circuit board is difficult to find within 1h.

外層用銅箔として単に銅箔0みを使用することは非常に
経済的″′Cあるが、外層銅箔に粉状窪みが発生すると
、外ノーパターンを形成することが不可能とたり、多層
プリント板として便用1 @ r! <なろ0 本発明は、外層用銅箔として率に銅箔〜みを使用する場
合に、外層銅箔に線状窪みを生ずることすく、プリプレ
グ層にボイドを生じたい銅銀り積層板(IJ!A造力法
を提供することを目的とする。
It is very economical to simply use 0-layer copper foil as the copper foil for the outer layer, but if powder-like depressions occur in the outer layer copper foil, it may be impossible to form an outer pattern, and multi-layer Convenient use as a printed board 1 @ r! The purpose is to provide a method for forming copper-silver laminates (IJ!A).

〔vl、題を解決するためσ〕手手段 上記目的7に連成するために、本発明においては。[vl, σ to solve the problem] Means In order to achieve the above objective 7, in the present invention.

内層用回路を形成したn4層板と外層銅箔とσ」間にプ
リプレグ層を設け、該プリプレグJ−σjうち外ノー銅
箔に接するプリプレグに昇温速度6℃/分でσノ最低溶
融粘度2000〜3000ボイスσノ側脂會、内層用回
路を形成した積層板に接するプリプレグには昇温速度3
℃/分でLol)最低溶融粘度が1500ボイズ未満σ
〕樹脂を使用すること七%徴とする。
A prepreg layer is provided between the n4-layer board on which the inner layer circuit is formed, the outer layer copper foil, and σ, and among the prepregs J-σj, the prepreg in contact with the outer copper foil is heated at a heating rate of 6°C/min to the lowest melt viscosity of σ. 2000-3000 voice σ side resin assembly, heating rate 3 for the prepreg in contact with the laminate plate on which the inner layer circuit was formed.
Lol in °C/min) Minimum melt viscosity less than 1500 boisσ
] Resin must be used at a rate of 7%.

〔作用〕[Effect]

外層銅箔lC接するプリプレグには溶融最低粘度が高い
もσノすなわち流動性が小さい樹脂を使用する。内層回
路64層板に接するプリプレグVcは流動性の大きいも
σJを使用する。外層銅箔に接するプリプレグには流動
性が小さい根線状窪みを生じない。ただし1%に流動性
が小さい条件ではプリプレグ層にボイドを発生する傾向
が現われる。
For the prepreg in contact with the outer copper foil 1C, a resin having a high minimum melting viscosity but having low σ, that is, low fluidity, is used. As the prepreg Vc in contact with the inner circuit 64 layer plate, σJ, which has high fluidity, is used. The prepreg in contact with the outer layer copper foil does not have root line depressions due to its low fluidity. However, under conditions where the fluidity is as low as 1%, there is a tendency for voids to occur in the prepreg layer.

こσjボイド現象を防ぐには、内層−路!j4層板に接
するプリプレグに%に流動性が大きい樹B¥1を用いる
と良い。
To prevent this σj void phenomenon, the inner layer - path! It is better to use wood B ¥1, which has a relatively high fluidity, for the prepreg in contact with the j4-layer board.

外層銅箔に線状窪みを生ぜず、プリプレグ層にボイドを
生ずることがない条件としては、外ノ#4銅陥に接する
プリプレグに溶融最低粘度2000〜3000ボイズが
好ましく、内層す路積ノー板に接するプリプレグには、
内N回路り残鋼率によって若干変わるが、1500ボイ
ズ以下が好ましい。
As conditions for not producing linear dents in the outer layer copper foil and without producing voids in the prepreg layer, it is preferable that the prepreg in contact with the outer #4 copper foil has a minimum melting viscosity of 2000 to 3000 voids, and the inner layer has no surface lamination plate. The prepreg in contact with
Although it varies slightly depending on the inner N circuit residual steel ratio, it is preferably 1500 voids or less.

〔実施例〕〔Example〕

難燃化エポキシ樹脂ワニス(NEMA、FR4相当)を
ガラス布(日東紡社WEA−116F、)に樹脂分が約
50%となるように含浸し、乾燥条件を種々変えてBス
テージのプリプレグを得た。
Glass cloth (Nittobo Co., Ltd. WEA-116F) was impregnated with a flame-retardant epoxy resin varnish (NEMA, equivalent to FR4) so that the resin content was approximately 50%, and B-stage prepreg was obtained by varying the drying conditions. Ta.

プリプレグの最低溶融粘度は、島津製作pfr1!!!
高架式フローテスターを便用し、a7φ×10ffiω
ノズ/l/、 2〜4kg/at圧、80’Cから14
0℃!テ’に昇温速度3℃/分℃測定した。
The minimum melt viscosity of prepreg is pfr1 manufactured by Shimadzu! ! !
Using an elevated flow tester, a7φ×10ffiω
Nozzle/l/, 2-4 kg/at pressure, 80'C to 14
0℃! The temperature was then measured at a heating rate of 3°C/min.

得たプリプレグり最低溶融粘度は、590,1050.
2250,3100ボイズリ4mである。
The minimum melt viscosity of the obtained prepreg was 590,1050.
2250, 3100 boizuri 4m.

次に本実施9′Ilにおいては、第1図に示す4鳩プリ
ント板用鋼張積層板の成形に上記@料を用いた。
Next, in this Example 9'I1, the above-mentioned @ material was used for forming a steel clad laminate for a four-layer printed board shown in FIG.

両面内層回路形成鋼張積層板(銅箔厚さ70μm)50
両側に厚さ[]、l a+mσ」プリプレグA、  B
、  Ck図に示す配列をし、さらに七〇ノ外層として
厚さ18μmす@陥2會亘ねた。
Double-sided inner layer circuit formed steel clad laminate (copper foil thickness 70μm) 50
Thickness [], l a+mσ” prepreg A, B on both sides
The structure was arranged as shown in the diagram Ck, and an outer layer of 18 μm in thickness was formed for two sessions.

第1図σノ#!成による4層プリント板6を、第2図に
示すように、プレス熱板9間にステンレス板7と交互に
配し、熱板に接してクツシ冒ン@8を置いて、加熱加圧
成形した0 第1図のプリプレグA、  B、  C’に用いたプリ
プレグσ」溶融最低粘度及び組合わせ上表1に示す。
Figure 1 σノ#! As shown in Fig. 2, the four-layer printed boards 6 made by the above process are placed alternately with the stainless steel plates 7 between the press hot plates 9, and a shoe brush @8 is placed in contact with the hot plates to form the four-layer printed boards 6 under heat and pressure. The minimum melting viscosity and combinations of the prepregs σ used for prepregs A, B, and C' in FIG. 1 are shown in Table 1 above.

表 表 注1)4層プリント板用t14張り積層板を、各8枚製
造したときの線状窪みの発生枚数を示す。
Table Note 1) Shows the number of sheets with linear dents when 8 sheets each of 4-layer T14 laminates for printed boards were manufactured.

従来例1,2は従来法によってA、B、CL:v何れの
粘度も同じ値とした。実施例1.2.3は、本発明によ
って外層銅箔に接するAの粘度を高く。
In Conventional Examples 1 and 2, the viscosities of A, B, and CL:v were set to the same value by the conventional method. In Examples 1.2.3, the viscosity of A in contact with the outer layer copper foil was increased according to the present invention.

内層用回路積層板に接するCD粘度を低くした。The CD viscosity in contact with the inner layer circuit laminate was lowered.

上記に基づいて成形した4#プリント板用槓層板を表I
VC示す5mVCつき各8枚を得た。これを表2に示す
特性につき調べた結果を表示した。
Table I shows the 4# printed board laminated board formed based on the above method.
Eight pieces each with 5 mVC shown as VC were obtained. The results of investigating the properties shown in Table 2 are shown.

〔発明σ〕効果〕 本発明り実施例では線状窪みを発生せず、これに反して
従来法による従来例″′Cは線状窪みを発生することが
表2によって明らかに分かる。ただし、実施例2りよう
に、内層用囲路を形成する積層板に接するプリプレグが
流れにくい場合はボイド七発生する可能性があり、実施
例1及び2りように流れ易い条件ではボイドを発生しな
い。
[Invention σ] Effect] It can be clearly seen from Table 2 that the embodiment according to the present invention does not generate linear depressions, whereas the conventional example ``'C according to the conventional method generates linear depressions.However, As in Example 2, if the prepreg in contact with the laminated plate forming the inner layer enclosure does not easily flow, voids may occur, but under conditions where it easily flows as in Examples 1 and 2, voids do not occur.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明カ1/i成形前04層プリント板栖或、
第2図は積層成形σJ実施桐成例、第3図は従来例にお
ける線状窪み説明図である。 1・・・・・・線状窪み、   2・・・・・・外層鋼
量。 3・・・・・・プリプレグ層、  4・・・・・・内層
回路、5・・・・・・積層板、      A、B、C
・・・・・・プリプレグ。 6・・・・・・4ff!7プリント板、7・・・・・・
ステンレス板。 8・・・・・・クッシ茸ン材、  9・・・・・・プレ
ス熱敏。 第3図
Figure 1 shows the 04-layer printed board before molding according to the present invention.
FIG. 2 is an example of laminated σJ paulownia formation, and FIG. 3 is an explanatory diagram of linear depressions in a conventional example. 1... Linear depression, 2... Outer layer steel amount. 3...Prepreg layer, 4...Inner layer circuit, 5...Laminated board, A, B, C
・・・・・・Prepreg. 6...4ff! 7 printed board, 7...
Stainless steel plate. 8...Kushi mushroom material, 9...Press heat sensitivity. Figure 3

Claims (1)

【特許請求の範囲】[Claims] 1.内層用回路を形成した積層板と外層銅箔との間にプ
リプレグ層を設け、該プリプレグ層のうち外層銅箔に接
するプリプレグに昇温速度3℃/分での最低溶融粘度2
000〜3000ボイズの樹脂を、内層用回路を形成し
た積層板に接するプリプレグには昇温速度3℃/分での
最低溶融粘度が1500ボイズ未満の樹脂を使用するこ
とを特徴とする銅張り積層板の製造方法。
1. A prepreg layer is provided between the laminate on which the inner layer circuit is formed and the outer copper foil, and the prepreg in contact with the outer copper foil of the prepreg layer has a minimum melt viscosity of 2 at a heating rate of 3°C/min.
A copper-clad laminate characterized in that a resin with a minimum melt viscosity of less than 1500 voids at a heating rate of 3° C./min is used for the prepreg in contact with the laminate board on which the inner layer circuit is formed. Method of manufacturing the board.
JP32648889A 1989-12-15 1989-12-15 Manufacture of copper-clad laminate Pending JPH03187293A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP32648889A JPH03187293A (en) 1989-12-15 1989-12-15 Manufacture of copper-clad laminate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP32648889A JPH03187293A (en) 1989-12-15 1989-12-15 Manufacture of copper-clad laminate

Publications (1)

Publication Number Publication Date
JPH03187293A true JPH03187293A (en) 1991-08-15

Family

ID=18188383

Family Applications (1)

Application Number Title Priority Date Filing Date
JP32648889A Pending JPH03187293A (en) 1989-12-15 1989-12-15 Manufacture of copper-clad laminate

Country Status (1)

Country Link
JP (1) JPH03187293A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0715570A4 (en) * 1993-08-23 1998-01-14 Parlex Corp Multiple layer printed circuit boards and method of manufacture
WO2015129600A1 (en) * 2014-02-26 2015-09-03 株式会社村田製作所 Multilayer substrate manufacturing method, and multilayer substrate

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0715570A4 (en) * 1993-08-23 1998-01-14 Parlex Corp Multiple layer printed circuit boards and method of manufacture
WO2015129600A1 (en) * 2014-02-26 2015-09-03 株式会社村田製作所 Multilayer substrate manufacturing method, and multilayer substrate
JP5880802B1 (en) * 2014-02-26 2016-03-09 株式会社村田製作所 Multilayer substrate manufacturing method and multilayer substrate
US10051730B2 (en) 2014-02-26 2018-08-14 Murata Manufacturing Co., Ltd. Multilayer substrate manufacturing method and multilayer substrate

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