JPH0350367U - - Google Patents
Info
- Publication number
- JPH0350367U JPH0350367U JP10904589U JP10904589U JPH0350367U JP H0350367 U JPH0350367 U JP H0350367U JP 10904589 U JP10904589 U JP 10904589U JP 10904589 U JP10904589 U JP 10904589U JP H0350367 U JPH0350367 U JP H0350367U
- Authority
- JP
- Japan
- Prior art keywords
- circuit board
- integrated circuit
- thick film
- film integrated
- layer conductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004020 conductor Substances 0.000 claims description 5
- 239000011521 glass Substances 0.000 claims 2
- 239000000758 substrate Substances 0.000 claims 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
Landscapes
- Parts Printed On Printed Circuit Boards (AREA)
Description
第１図は本案の一実施例の平面図、第２図は断
面図、第３図は従来技術の断面図、第４図は本案
と従来技術との抵抗膜厚特性比較図である。
２ａ……下層導体、２ｂ……上層導体、３ａ…
…絶縁体、３ｂ……捨パターン、４ａ，４ｂ……
低抗体。
FIG. 1 is a plan view of an embodiment of the present invention, FIG. 2 is a sectional view, FIG. 3 is a sectional view of a conventional technique, and FIG. 4 is a comparison diagram of resistance film thickness characteristics between the present invention and the prior art. 2a... lower layer conductor, 2b... upper layer conductor, 3a...
...Insulator, 3b...Discarded pattern, 4a, 4b...
Low antibodies.
Claims (1)
を設け、更にその上に上層導体を形成して多層配
線部を構成する混成厚膜集積回路基板において、
前記下層導体上に形成した抵抗体外周部に、少な
くとも１ケ所以上の絶縁ガラスから成る捨パター
ンを設けた事を特徴とする混成厚膜集積回路基板
。 In a hybrid thick film integrated circuit board in which an insulating glass is provided on a lower layer conductor formed on an insulating substrate, and an upper layer conductor is further formed thereon to constitute a multilayer wiring part,
A hybrid thick film integrated circuit board characterized in that a discarded pattern made of insulating glass is provided in at least one location on the outer periphery of the resistor formed on the lower conductor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10904589U JPH0350367U (en) | 1989-09-20 | 1989-09-20 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10904589U JPH0350367U (en) | 1989-09-20 | 1989-09-20 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0350367U true JPH0350367U (en) | 1991-05-16 |
Family
ID=31657649
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10904589U Pending JPH0350367U (en) | 1989-09-20 | 1989-09-20 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0350367U (en) |
-
1989
- 1989-09-20 JP JP10904589U patent/JPH0350367U/ja active Pending
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