JPH0352247A - Semiconductor testing apparatus - Google Patents
Semiconductor testing apparatusInfo
- Publication number
- JPH0352247A JPH0352247A JP18806689A JP18806689A JPH0352247A JP H0352247 A JPH0352247 A JP H0352247A JP 18806689 A JP18806689 A JP 18806689A JP 18806689 A JP18806689 A JP 18806689A JP H0352247 A JPH0352247 A JP H0352247A
- Authority
- JP
- Japan
- Prior art keywords
- standard
- deviation
- distribution
- defective
- measured values
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000012360 testing method Methods 0.000 title claims abstract description 12
- 239000004065 semiconductor Substances 0.000 title claims description 9
- 230000002950 deficient Effects 0.000 claims abstract description 27
- 238000005259 measurement Methods 0.000 description 7
- 238000000034 method Methods 0.000 description 6
- 238000010586 diagram Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 1
Landscapes
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
Abstract
Description
〔産業上の利用分野]
この発明は半導体の良品、不良品の判定、選別を行う半
導体試験装置に関する.[Field of Industrial Application] This invention relates to a semiconductor testing device for determining and sorting semiconductors into good and defective products.
【発明の概要]
この発明の半導体試験装置は、電気特性試験の測定値に
対し、一定の規格で良品、不良品の判定を行った後に,
測定値から偏差を求め、その偏差から規格を計算により
求め、偏差からの規格で再度良品、不良品の判定を行う
事により,分布の外れに位置するサンプルは不良品判定
とするようにしたものである.
[従来の技術1
第2図は従来技術の半導体試験装置の良品、不良品判定
方法のフローチャートである.従来は第2図に示すよう
に測定l、測定値読み込み2で得られた測定値に対し,
一定の規格による判定3を行い、良品7、不良品8に判
定していた.〔発明が解決しようとする課題〕
上記のような構成では、一定の規格の範囲内であれば分
布の外れに位置する他のサンプルに比べ問題のあるサン
プルでも良品判定してしまうという欠点があった.
〔課題を解決するための手段〕
上記問題点を解決するために,この発明は電気特性試験
の測定値に対し一定の規格で良品、不良品の判定を行っ
た後に、測定値から偏差を求め、その偏差から規楕を求
め、再度良品、不良品の判定を行うようにした.
〔作用]
上記のような構成にすれば、分布の外れに位置するサン
プルを不良品判定とする事ができる.〔実施例J
以下に本発明の実施例を図面に基づいて説明する.第1
図は本発明の半導体試験装置における良品,不良品判定
方法のフローチャートである.測定1、測定値読み込み
2によって得られた測定値に対し従来と同様に一定の規
格による判定3を行う、一定の規格による判定3で規格
外であれば不良品判定とし、規格内であれば偏差計算4
、偏差からの規格計算5を行い、偏差からの規格による
判定6で再度判定を行う、偏差からの規格による判定6
で規格外であれば不良品8と判定し、規格内であれば良
品7と判定する.
第3図は本発明に関する良品、不良品判定方法の概念図
である.一定の規格9に対しサンプルの測定値の分布が
分布10のようである場合、分布の外れに位置するサン
プル1lは他のサンプルに比べ問題があるにちかかわら
ず、一定の規格9の範囲内であるため従来の方法だと良
品判定となってしまう.これに対し偏差からの規格l2
を設定し判定を行い分布の外れに位置するサンプルl1
を不良品判定とする.
【発明の効果】
この発明は以上説明したように,偏差により規格を決定
し判定を行う事により、分布の外れにあるサンプルを不
良品判定とする事ができる.[Summary of the Invention] The semiconductor testing device of the present invention determines whether a good product or a defective product is determined according to a certain standard based on the measured values of an electrical property test.
The deviation is calculated from the measured value, the standard is calculated from the deviation, and the standard from the deviation is used to again judge whether it is a good product or a defective product, so that samples located on the outskirts of the distribution are determined to be defective. It is. [Prior art 1] Fig. 2 is a flowchart of a method for determining whether a good product or a defective product is determined using a semiconductor testing device according to the prior art. Conventionally, as shown in Figure 2, for the measurement value obtained by measurement 1 and measurement value reading 2,
Judgment 3 was performed based on certain standards, and 7 were found to be good and 8 were defective. [Problem to be Solved by the Invention] The above configuration has the disadvantage that if it is within a certain standard range, even a sample with problems compared to other samples located on the outskirts of the distribution will be judged as good. Ta. [Means for Solving the Problems] In order to solve the above problems, the present invention determines the deviation from the measured values after determining whether the measured values are good or defective according to a certain standard based on the measured values of the electrical property test. , the standard ellipse was determined from the deviation, and the judgment of good and defective products was made again. [Effect] With the above configuration, samples located on the outskirts of the distribution can be determined to be defective. [Example J An example of the present invention will be described below based on the drawings. 1st
The figure is a flowchart of a method for determining good and defective products in the semiconductor testing device of the present invention. The measured values obtained by measurement 1 and measurement value reading 2 are subjected to judgment 3 according to a certain standard as in the past.If the judgment 3 according to the certain standard is out of the standard, it is judged as a defective product, and if it is within the standard. Deviation calculation 4
, perform the standard calculation 5 from the deviation, and perform the judgment again in the judgment 6 based on the standard from the deviation, the judgment 6 based on the standard from the deviation.
If it is outside the standard, it is determined to be defective product 8, and if it is within the standard, it is determined to be good product 7. FIG. 3 is a conceptual diagram of the method for determining good and defective products according to the present invention. If the distribution of measured values of samples is like distribution 10 for a certain standard 9, the sample 1l located on the outskirts of the distribution is within the range of the certain standard 9 even though it has problems compared to other samples. Therefore, the conventional method would result in a non-defective product. On the other hand, the standard l2 from the deviation
sample l1 located on the outskirts of the distribution.
is determined to be a defective product. [Effects of the Invention] As explained above, in this invention, by determining the standard based on the deviation and making the judgment, it is possible to judge a sample that is outside the distribution as a defective product.
第1図は本発明の半導体試験装置の良品、不良品の判定
方法のフローチャート、第2図は、従来の半導体試験装
置の良品、不良品の判定方法のフローチャート、第3図
は本発明に関する良品、不良品判定方法の概念図である
.
測定
測定値読み込み
一定の規格による判定
偏差計算
偏差からの規格計算
6 ・
7 ・
8 ・
9 ・
1 0 ・
11 ・
1 2 ・
・偏差からの規格による判定
・良品
・不良品
・一定の規格
・サンプルの測定値の分布
・分布の外れに位置するサンプル
・偏差からの規格範囲
以FIG. 1 is a flowchart of a method for determining non-defective products and defective products using the semiconductor testing device of the present invention, FIG. 2 is a flowchart of a method for determining non-defective products and defective products using a conventional semiconductor testing device, and FIG. , is a conceptual diagram of a defective product determination method. Measurement Measurement reading Judgment based on a certain standard Deviation calculation Standard calculation from the deviation 6 ・ 7 ・ 8 ・ 9 ・ 1 0 ・ 11 ・ 1 2 ・ Judgment based on the standard from the deviation ・ Good product / Defective product / Fixed standard / Sample distribution of measured values, samples located on the outskirts of the distribution, deviations from the standard range
Claims (1)
定値から偏差を求め、その偏差から規格を決定し、良品
、不良品の判定を行う事を特徴とする半導体試験装置。A semiconductor testing device having an electrical property testing function, which is characterized by determining a deviation from a measured value, determining a standard from the deviation, and determining whether a product is good or defective.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18806689A JPH0352247A (en) | 1989-07-20 | 1989-07-20 | Semiconductor testing apparatus |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18806689A JPH0352247A (en) | 1989-07-20 | 1989-07-20 | Semiconductor testing apparatus |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0352247A true JPH0352247A (en) | 1991-03-06 |
Family
ID=16217110
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP18806689A Pending JPH0352247A (en) | 1989-07-20 | 1989-07-20 | Semiconductor testing apparatus |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0352247A (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2007113968A1 (en) * | 2006-03-31 | 2007-10-11 | Matsushita Electric Industrial Co., Ltd. | Semiconductor integrated circuit testing method and information recording medium |
| JP2008002900A (en) * | 2006-06-21 | 2008-01-10 | Nec Electronics Corp | Screening method, system, and program for semiconductor devices |
| JP2009188418A (en) * | 2006-02-17 | 2009-08-20 | Test Advantage Inc | Method and apparatus for data analysis |
| WO2010137488A1 (en) * | 2009-05-29 | 2010-12-02 | 株式会社村田製作所 | Product inspection device, product inspection method, and computer program |
| JP2014063914A (en) * | 2012-09-21 | 2014-04-10 | Renesas Electronics Corp | Semiconductor inspection device, semiconductor inspection method and program |
-
1989
- 1989-07-20 JP JP18806689A patent/JPH0352247A/en active Pending
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2009188418A (en) * | 2006-02-17 | 2009-08-20 | Test Advantage Inc | Method and apparatus for data analysis |
| WO2007113968A1 (en) * | 2006-03-31 | 2007-10-11 | Matsushita Electric Industrial Co., Ltd. | Semiconductor integrated circuit testing method and information recording medium |
| US7719301B2 (en) | 2006-03-31 | 2010-05-18 | Panasonic Corporation | Testing method of semiconductor integrated circuit and information recording medium |
| JP2008002900A (en) * | 2006-06-21 | 2008-01-10 | Nec Electronics Corp | Screening method, system, and program for semiconductor devices |
| WO2010137488A1 (en) * | 2009-05-29 | 2010-12-02 | 株式会社村田製作所 | Product inspection device, product inspection method, and computer program |
| CN102449645A (en) * | 2009-05-29 | 2012-05-09 | 株式会社村田制作所 | Product inspection device, product inspection method, and computer program |
| JPWO2010137488A1 (en) * | 2009-05-29 | 2012-11-12 | 株式会社村田製作所 | Product inspection device, product inspection method, and computer program |
| US9037436B2 (en) | 2009-05-29 | 2015-05-19 | Murata Manufacturing Co., Ltd. | Product inspection device, product inspection method, and computer program |
| US9870343B2 (en) | 2009-05-29 | 2018-01-16 | Murata Manufacturing Co., Ltd. | Product inspection device, product inspection method, and computer program |
| JP2014063914A (en) * | 2012-09-21 | 2014-04-10 | Renesas Electronics Corp | Semiconductor inspection device, semiconductor inspection method and program |
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