JPH0363942U - - Google Patents
Info
- Publication number
- JPH0363942U JPH0363942U JP12545489U JP12545489U JPH0363942U JP H0363942 U JPH0363942 U JP H0363942U JP 12545489 U JP12545489 U JP 12545489U JP 12545489 U JP12545489 U JP 12545489U JP H0363942 U JPH0363942 U JP H0363942U
- Authority
- JP
- Japan
- Prior art keywords
- insulating base
- package
- lid
- recess
- sealing material
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 claims description 6
- 239000003566 sealing material Substances 0.000 claims description 3
- 238000005516 engineering process Methods 0.000 claims 1
- 239000002184 metal Substances 0.000 description 1
Landscapes
- Die Bonding (AREA)
- Lead Frames For Integrated Circuits (AREA)
Description
第１図は本考案の半導体素子収納用パツケージ
の一実施例を示す断面図、第２図は第１図に示す
半導体素子収納用パツケージの絶縁基体の平面図
、第３図は従来の半導体素子収納用パツケージの
断面図、第４図は第３図に示すパツケージの絶縁
基体の平面図である。
１……絶縁基体、１ａ……凹部、２……蓋体、
４……メタライズ金属層、６……外部リード端子
、７……絶縁膜、８……封止材。
FIG. 1 is a sectional view showing an embodiment of the package for storing semiconductor elements of the present invention, FIG. 2 is a plan view of the insulating base of the package for storing semiconductor elements shown in FIG. 1, and FIG. 3 is a view of a conventional semiconductor element. FIG. 4 is a cross-sectional view of the storage package, and FIG. 4 is a plan view of the insulating base of the package shown in FIG. 1... Insulating base, 1a... Recess, 2... Lid,
4... Metallized metal layer, 6... External lead terminal, 7... Insulating film, 8... Sealing material.
Claims (1)
基体と蓋体とから成り、絶縁基体上に該絶縁基体
の凹部を塞ぐよう蓋体を封止材を介し取着するよ
うになした半導体素子収納用パツケージにおいて
、前記絶縁基体の少なくとも封止材が接合する表
面に絶縁基体と実質的に同一の熱膨張係数を有し
、且つ表面の中心線平均粗さ（Ｒａ）がＲａ≧０
．６５μｍである厚膜形成技術により形成される
絶縁膜を被着させたことを特徴とする半導体素子
収納用パツケージ。 A semiconductor device storage device comprising an insulating base having a recess for accommodating a semiconductor element and a lid, the lid being attached to the insulating base through a sealing material so as to close the recess of the insulating base. In the package, at least the surface of the insulating base to which the sealing material is bonded has substantially the same coefficient of thermal expansion as the insulating base, and the centerline average roughness (Ra) of the surface is Ra≧0.
．． A package for housing a semiconductor element, characterized in that it is coated with an insulating film formed by a thick film forming technology of 65 μm.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12545489U JPH0745962Y2 (en) | 1989-10-26 | 1989-10-26 | Package for storing semiconductor devices |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12545489U JPH0745962Y2 (en) | 1989-10-26 | 1989-10-26 | Package for storing semiconductor devices |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0363942U true JPH0363942U (en) | 1991-06-21 |
| JPH0745962Y2 JPH0745962Y2 (en) | 1995-10-18 |
Family
ID=31673324
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12545489U Expired - Lifetime JPH0745962Y2 (en) | 1989-10-26 | 1989-10-26 | Package for storing semiconductor devices |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0745962Y2 (en) |
-
1989
- 1989-10-26 JP JP12545489U patent/JPH0745962Y2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0745962Y2 (en) | 1995-10-18 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| EXPY | Cancellation because of completion of term |